Karthikeya Boominathan

According to our database, Karthikeya Boominathan authored at least 2 papers between 2012 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2013

Continuous-Time ΔΣ Modulators With Improved Linearity and Reduced Clock Jitter Sensitivity Using the Switched-Capacitor Return-to-Zero DAC.

Timir Nandi, Karthikeya Boominathan, Shanthi Pavan

IEEE J. Solid State Circuits, 2013

2012

A continuous-time ΔΣ modulator with 87 dB dynamic range in a 2MHz signal bandwidth using a Switched-Capacitor Return-to-Zero DAC.

Timir Nandi, Karthikeya Boominathan, Shanthi Pavan

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012