Khaled Grati

Orcid: 0000-0003-1993-9926

According to our database1, Khaled Grati authored at least 18 papers between 2001 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
Proceedings of Workshop AEW10: Concepts in Information Theory and Communications.
CoRR, 2017

2015
AIS data exchange protocol study and embedded software development for maritime navigation.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

2013
Equalizer's Use Limitation for Complexity Reduction in a Green Radio Receiver.
J. Comput. Networks Commun., 2013

Management architecture for green cognitive radio equipments.
Trans. Emerg. Telecommun. Technol., 2013

Reducing the receiver's computation complexity by limiting the use of the beamforming action.
Proceedings of the 20st International Conference on Telecommunications, 2013

2012
Power Consumption Models for Decimation FIR Filters in Multistandard Receivers.
VLSI Design, 2012

A flexible processor for FFT and Viterbi algorithms.
Proceedings of the International Symposium on Communications and Information Technologies, 2012

Statistical decision making method for cognitive radio.
Proceedings of the 19th International Conference on Telecommunications, 2012

Cognitive engine design for cognitive radio.
Proceedings of the 2012 International Conference on Multimedia Computing and Systems, 2012

2011
An Efficient Flexible Common Operator for FFT and Viterbi Algorithms.
Proceedings of the 73rd IEEE Vehicular Technology Conference, 2011

2009
Design and implementation of a reconfigurable decimation and channel selection filter for GSM and UMTS radio standards.
Proceedings of the 2009 IEEE Wireless Communications and Networking Conference, 2009

Experiments on designing low power decimation filter for multistandard receiver on heterogeneous targets.
Proceedings of the 17th European Signal Processing Conference, 2009

2007
Low Power Implementation of Decimation Filters in Multistandard Radio Receiver Using Optimized Multiplication-Accumulation Unit.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2005
FPGA bulding blocks for an hybrid base band digital predistorter suitable for 3G poweramplifiers.
Proceedings of the 12th IEEE International Conference on Electronics, 2005

Design and hardware implementation of digital channel selection decimating filter for multistandard receiver.
Proceedings of the 12th IEEE International Conference on Electronics, 2005

2002
On design and implementation of a decimation filter for multistandard wireless transceivers.
IEEE Trans. Wirel. Commun., 2002

Relaxed decimation filter specifications for wireless transceivers.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001
Design and implementation of cascade decimation filter for radio communications.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001


  Loading...