Klaus Feske

According to our database1, Klaus Feske authored at least 11 papers between 1996 and 2002.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2002
Entwurfsunterstützung zur hardwarebasierten TCP/IP-Beschleunigung (Design Support for Hardware Based TCP/IP Accelerator).
Informationstechnik Tech. Inform., 2002

SoC Based Low Cost Design of Digital Audio Broadcasting Transport Network Applications.
Proceedings of the Field-Programmable Logic and Applications, 2002

Enhanced Reusability for SoC-Based HW/SW Co-Design.
Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

2001
TCP/IP Protocol Engine System Simulation.
Proceedings of the Protocols for Multimedia Systems, 6th International Conference, 2001

1999
Rapid FPGA Prototyping of a DAB Test Data Generator Using Protocol Compiler.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

1998
Verringerung der Leistungsaufnahme in sequentiellen Schaltungen durch Vorlogik und zweistufige Zustandskodierung.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 1998

FPGA based prototyping using a target driven FSM partitioning strategy.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

Multi-Criterial State Assignment for Low Power FSM Design.
Proceedings of the 24th EUROMICRO '98 Conference, 1998

1997
Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997

Low Power Design of FSMs by State Assignment and Disabling Self-Loops.
Proceedings of the 23rd EUROMICRO Conference '97, 1997

1996
State assignment for FSM low power design.
Proceedings of the conference on European design automation, 1996


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