Krishnamurthy Murali

According to our database1, Krishnamurthy Murali authored at least 28 papers between 1993 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2016
Chimera States in Star Networks.
Int. J. Bifurc. Chaos, 2016

Explicit construction of single input-single output logic gates from three soliton solution of Manakov system.
Commun. Nonlinear Sci. Numer. Simul., 2016

Different types of synchronization in coupled network based chaotic circuits.
Commun. Nonlinear Sci. Numer. Simul., 2016

2015
On negative resistance oscillators as modified multi-vibrators.
Proceedings of the European Conference on Circuit Theory and Design, 2015

2014
Dynamic Environment Coupling Induced Synchronized States in Coupled Time-Delayed Electronic Circuits.
Int. J. Bifurc. Chaos, 2014

Targeting Temporal Patterns in Time-Delay Chaotic Systems.
Int. J. Bifurc. Chaos, 2014

Enhanced logical stochastic resonance under periodic forcing.
Commun. Nonlinear Sci. Numer. Simul., 2014

2013
Logic from Dynamics.
Proceedings of the Chaotic Signal Processing., 2013

2011
Design of Time Delayed Chaotic Circuit with Threshold Controller.
Int. J. Bifurc. Chaos, 2011

Ordered and Chaotic Phenomena in Two Coupled Forced LCR oscillators Sharing a Common Nonlinearity.
Int. J. Bifurc. Chaos, 2011

Chaotic Dynamics of a Simple Parametrically Driven dissipative Circuit.
Int. J. Bifurc. Chaos, 2011

Observation of Chaotic Beats in a Driven Memristive Chua's Circuit.
Int. J. Bifurc. Chaos, 2011

2010
Design of Threshold Controller Based Chaotic Circuits.
Int. J. Bifurc. Chaos, 2010

2009
An eigenvalue study of a double integrator oscillator.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2006
Generating multi-scroll chaotic attractors via threshold control.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Reconfigurable Logic Element using a Chaotic Circuit.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Exploiting Chaos for Computation.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
The smallest transistor-based nonautonomous chaotic circuit.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

2003
Spread-spectrum image encoding and decoding using ergodic chaos.
IEEE Trans. Consumer Electron., 2003

Implementation of nor Gate by a Chaotic Chua's Circuit.
Int. J. Bifurc. Chaos, 2003

2001
Secure communication using a chaos based signal encryption scheme.
IEEE Trans. Consumer Electron., 2001

Hyperchaotic circuit with damped harmonic oscillators.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
Rich Variety of bifurcations and Chaos in a Variant of Murali-Lakshmanan-Chua Circuit.
Int. J. Bifurc. Chaos, 2000

Synchronization Based Signal Transmission with Heterogeneous Chaotic Systems.
Int. J. Bifurc. Chaos, 2000

Noise Performance of a Synchronization Scheme through Compound Chaotic Signal.
Int. J. Bifurc. Chaos, 2000

1998
An eigenvalue study of the MLC circuit.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1993
Controlling of Chaos in the Driven Chua's Circuit.
J. Circuits Syst. Comput., 1993

Controlling of Chaos in the Driven Chua's Circuit.
Proceedings of the Chua's Circuit: A Paradigm for Chaos, 1993


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