Kyungrak Choi

Orcid: 0000-0001-8926-4974

According to our database1, Kyungrak Choi authored at least 5 papers between 2016 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
Low Cost Convolutional Neural Network Accelerator Based on Bi-Directional Filtering and Bit-Width Reduction.
IEEE Access, 2018

Content addressable memory based binarized neural network accelerator using time-domain signal processing.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Bit-width reduction and customized register for low cost convolutional neural network accelerator.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

2016
Customized SRAM design for low power video code applications.
Proceedings of the International SoC Design Conference, 2016

A compact multi-mode CORDIC with Global-Shifting-Sum (GSS) method.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016


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