Kyeongho Lee
Orcid: 0000-0002-2550-2272
According to our database1,
Kyeongho Lee
authored at least 24 papers
between 1995 and 2023.
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Bibliography
2023
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2023
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023
2022
A Charge Domain P-8T SRAM Compute-In-Memory with Low-Cost DAC/ADC Operation for 4-bit Input Processing.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
Low-Cost 7T-SRAM Compute-in-Memory Design Based on Bit-Line Charge-Sharing Based Analog-to-Digital Conversion.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
A 10T SRAM Compute-In-Memory Macro with Analog MAC Operation and Time Domain Conversion.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
A 65-nm 0.6-fJ/Bit/Search Ternary Content Addressable Memory Using an Adaptive Match-Line Discharge.
IEEE J. Solid State Circuits, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
Low Cost Ternary Content Addressable Memory Based on Early Termination Precharge Scheme.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Content addressable memory based binarized neural network accelerator using time-domain signal processing.
Proceedings of the 55th Annual Design Automation Conference, 2018
2015
Proceedings of the 3rd International Conference on Human-Agent Interaction, 2015
A Preliminary Study on Human Trust Measurements by EEG for Human-Machine Interactions.
Proceedings of the 3rd International Conference on Human-Agent Interaction, 2015
2008
Wire-speed application flow generation in hardware platform for multi-gigabit traffic monitoring.
Proceedings of the IEEE/IFIP Network Operations and Management Symposium: Pervasive Management for Ubioquitous Networks and Services, 2008
2006
Novel Traffic Measurement Methodology for High Precision Applications Awareness in Multi-gigabit Networks.
Proceedings of the Management of Convergence Networks and Services, 2006
2005
Comparison frequency doubling and charge pump matching techniques for dual-band ΔΣ fractional-N frequency synthesizer.
IEEE J. Solid State Circuits, 2005
2003
IEEE J. Solid State Circuits, 2003
2002
A fully integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems.
IEEE J. Solid State Circuits, 2002
2001
A single-chip 2.4-GHz direct-conversion CMOS receiver for wireless local loop using multiphase reduced frequency conversion technique.
IEEE J. Solid State Circuits, 2001
2000
An all-analog multiphase delay-locked loop using a replica delay line for wide-range operation and low-jitter performance.
IEEE J. Solid State Circuits, 2000
1999
A 62.5-250 MHz multi-phase delay-locked loop using a replica delay line with triply controlled delay cells.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999
1998
1.04 GBd low EMI digital video interface system using small swing serial link technique.
IEEE J. Solid State Circuits, 1998
1997
IEEE J. Solid State Circuits, 1997
1995
IEEE J. Solid State Circuits, April, 1995