Lan Gao

Orcid: 0000-0001-5637-9417

Affiliations:
  • Capital Normal University, Beijing Key Laboratory of Electronic System Reliability and Prognostics, College of Information Engineering, China
  • Beihang University, School of Computer Science and Engineering, Beijing, China (PhD 2019)


According to our database1, Lan Gao authored at least 15 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Accelerating Look-Up Table based Matrix Multiplication on GPUs.
Proceedings of the 29th IEEE International Conference on Parallel and Distributed Systems, 2023

A Bit Level Acceleration of Mixed Precision Neural Network.
Proceedings of the 29th IEEE International Conference on Parallel and Distributed Systems, 2023

2022
Adaptive Contention Management for Fine-Grained Synchronization on Commodity GPUs.
ACM Trans. Archit. Code Optim., 2022

DA<sup>2</sup>F: Research on Robustness of Deep Learning Models Using Approximate Activation Function.
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

2020
Thread-Level Locking for SIMT Architectures.
IEEE Trans. Parallel Distributed Syst., 2020

Enabling Energy-Efficient and Reliable Neural Network via Neuron-Level Voltage Scaling.
IEEE Trans. Computers, 2020

Multi-dimensional optimization for approximate near-threshold computing.
Frontiers Inf. Technol. Electron. Eng., 2020

2019
Accelerating in-memory transaction processing using general purpose graphics processing units.
Future Gener. Comput. Syst., 2019

Multiple Algorithms Against Multiple Hardware Architectures: Data-Driven Exploration on Deep Convolution Neural Network.
Proceedings of the Network and Parallel Computing, 2019

Enabling Energy-Efficient and Reliable Neural Network via Neuron-Level Voltage Scaling.
Proceedings of the 25th IEEE International Conference on Parallel and Distributed Systems, 2019

Towards a General and Efficient Linked-List Hash Table on GPUs.
Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019

2018
SRAM- and STT-RAM-based hybrid, shared last-level cache for on-chip CPU-GPU heterogeneous architectures.
J. Supercomput., 2018

2016
Scheduling Tasks with Mixed Timing Constraints in GPU-Powered Real-Time Systems.
Proceedings of the 2016 International Conference on Supercomputing, 2016

Lock-based synchronization for GPU architectures.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

2014
Software Transactional Memory for GPU Architectures.
Proceedings of the 12th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2014


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