Jing Wang

Orcid: 0000-0003-3653-7013

Affiliations:
  • Renmin University of China, School of Information, Beijing, China
  • Capital Normal University, College of Information Engineering, Beijing Advanced Innovation Center for Imaging Technology, China (former)
  • Peking University, Beijing, China (PhD 2011)


According to our database1, Jing Wang authored at least 44 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2024
Tradeoff Between Age of Information and Operation Time for UAV Sensing Over Multi-Cell Cellular Networks.
IEEE Trans. Mob. Comput., April, 2024

Aerial Video Streaming Over 3D Cellular Networks: An Environment and Channel Knowledge Map Approach.
IEEE Trans. Wirel. Commun., February, 2024

2023
Enabling High-Efficient ReRAM-Based CNN Training Via Exploiting Crossbar-Level Insignificant Writing Elimination.
IEEE Trans. Computers, November, 2023

NAS-SE: Designing A Highly-Efficient In-Situ Neural Architecture Search Engine for Large-Scale Deployment.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

Accelerating Look-Up Table based Matrix Multiplication on GPUs.
Proceedings of the 29th IEEE International Conference on Parallel and Distributed Systems, 2023

STAR: An Efficient Softmax Engine for Attention Model with RRAM Crossbar.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
Adaptive Contention Management for Fine-Grained Synchronization on Commodity GPUs.
ACM Trans. Archit. Code Optim., 2022

A Compressed Data Partition and Loop Scheduling Scheme for Neural Networks.
IEEE Access, 2022

Energy-Efficient Trajectory Optimization for Aerial Video Surveillance under QoS Constraints.
Proceedings of the IEEE INFOCOM 2022, 2022

DA<sup>2</sup>F: Research on Robustness of Deep Learning Models Using Approximate Activation Function.
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

2021
A Robust Saliency Integrated Method for Monocular Motion Estimation.
Proceedings of the ICMVA 2021: International Conference on Machine Vision and Applications, Singapore, February 20, 2021

A Convolutional Neural Network Accelerator Based on NVDLA.
Proceedings of the ICACS '21: 2021 The 5th International Conference on Algorithms, Computing and Systems, Xi'an, China, September 24, 2021

Research on Mixed-Precision Quantization and Fault-Tolerant of Deep Neural Networks.
Proceedings of the CSAE 2021: The 5th International Conference on Computer Science and Application Engineering, Sanya, China, October 19, 2021

2020
Enabling Energy-Efficient and Reliable Neural Network via Neuron-Level Voltage Scaling.
IEEE Trans. Computers, 2020

Multi-dimensional optimization for approximate near-threshold computing.
Frontiers Inf. Technol. Electron. Eng., 2020

On the Exploration of a Low-Power Photonic Network Architecture.
IEEE Commun. Mag., 2020

Enabling Highly Efficient Capsule Networks Processing Through A PIM-Based Architecture Design.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

2019
DR Refresh: Releasing DRAM Potential by Enabling Read Accesses Under Refresh.
IEEE Trans. Computers, 2019

Attitude Angle Compensation for a Synchronous Acquisition Method Based on an MEMS Sensor.
Sensors, 2019

Enabling Energy-Efficient and Reliable Neural Network via Neuron-Level Voltage Scaling.
Proceedings of the 25th IEEE International Conference on Parallel and Distributed Systems, 2019

Neuron Fault Tolerance Capability Based Computation Reuse in DNNs.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2019

Reliability Enhancement of Neural Networks via Neuron-Level Vulnerability Quantization.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2019

2018
QIG: Quantifying the Importance and Interaction of GPGPU Architecture Parameters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Edge-Oriented Computing Paradigms: A Survey on Architecture Design and System Management.
ACM Comput. Surv., 2018

Towards Memory Friendly Long-Short Term Memory Networks (LSTMs) on Mobile GPUs.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

CounterMiner: Mining Big Performance Data from Hardware Counters.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

DR DRAM: Accelerating Memory-Read-Intensive Applications.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018

In-Situ AI: Towards Autonomous and Incremental Deep Learning for IoT Systems.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2017
On the Implication of NTC versus Dark Silicon on Emerging Scale-Out Workloads: The Multi-Core Architecture Perspective.
IEEE Trans. Parallel Distributed Syst., 2017

基于排队论的UM-BUS总线性能建模与评估 (Queuing Theory-guided Performance Evaluation on Reconfigurable High-speed Device Connected Bus).
计算机科学, 2017

Data re-allocation enabled cache locking for embedded systems.
J. Syst. Archit., 2017

Processing-in-Memory Enabled Graphics Processors for 3D Rendering.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016
Balanced loop retiming to effectively architect STT-RAM-based hybrid cache for VLIW processors.
Proceedings of the 31st Annual ACM Symposium on Applied Computing, 2016

Understanding the Behavior of Spark Workloads from Linux Kernel Parameters Perspective.
Proceedings of the Posters and Demos Session of the 17th International Middleware Conference, 2016

Exploring Variation-Aware Fault-Tolerant Cache under Near-Threshold Computing.
Proceedings of the 45th International Conference on Parallel Processing, 2016

An adaptive Non-Uniform Loop Tiling for DMA-based bulk data transfers on many-core processor.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Refresh-aware loop scheduling for high performance low power volatile STT-RAM.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

2015
Semi-supervised clustering with associative-link constraints for 3D models.
Proceedings of the 12th International Conference on Fuzzy Systems and Knowledge Discovery, 2015

Near threshold cloud processors for dark silicon mitigation: the impact on emerging scale-out workloads.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

Heterogeneous energy-efficient cache design in warehouse scale computers.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2014
Object-centric bank partition for reducing memory interference in CMP systems.
Proceedings of the Computing Frontiers Conference, CF'14, 2014

2013
SPIRE: improving dynamic binary translation through SPC-indexed indirect branch redirecting.
Proceedings of the ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments (co-located with ASPLOS 2013), 2013

Combining Process-Based Cache Partitioning and Pollute Region Isolation to Improve Shared Last Level Cache Utilization on Multicore Systems.
Proceedings of the 12th IEEE International Conference on Trust, 2013

2010
Cache Management with Partitioning-Aware Eviction and Thread-Aware Insertion/Promotion Policy.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2010


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