Lasse Natvig
Affiliations:- Norwegian University of Science and Technology, Norway
According to our database1,
Lasse Natvig
authored at least 50 papers
between 1990 and 2020.
Collaborative distances:
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Online presence:
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on idi.ntnu.no
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Bibliography
2020
2018
A vectorized k-means algorithm for compressed datasets: design and experimental analysis.
J. Supercomput., 2018
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018
2017
Proceedings of the 4th ACM SIGPLAN International Workshop on Libraries, 2017
2016
Transient Temperature Prediction for Aging Thermal Sensors Using Artificial Neural Network.
Proceedings of the 24th Euromicro International Conference on Parallel, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Climbing Mont Blanc - A Training Site for Energy Efficient Programming on Heterogeneous Multicore Processors.
CoRR, 2015
Cost-comfort balancing in a smart residential building with bidirectional energy trading.
Proceedings of the 2015 Sustainable Internet and ICT for Sustainability, 2015
Proceedings of the 22nd IEEE International Conference on High Performance Computing, 2015
2014
Performance and energy impact of parallelization and vectorization techniques in modern microprocessors.
Computing, 2014
Proceedings of the 2014 IEEE International Symposium on Performance Analysis of Systems and Software, 2014
Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014
Proceedings of the Architecture of Computing Systems - ARCS 2014, 2014
2013
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
Proceedings of the International Conference on High Performance Computing & Simulation, 2013
Proceedings of the International Conference on Computational Science, 2013
Proceedings of the International Green Computing Conference, 2013
2012
Improving Energy Efficiency through Parallelization and Vectorization on Intel Core i5 and i7 Processors.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012
Proceedings of the ICT as Key Technology against Global Warming, 2012
Performance and Energy Efficiency Analysis of Data Reuse Transformation Methodology on Multicore Processor.
Proceedings of the Euro-Par 2012: Parallel Processing Workshops, 2012
2011
Trans. High Perform. Embed. Archit. Compil., 2011
J. Instr. Level Parallelism, 2011
Proceedings of the Operations Research Proceedings 2011, Selected Papers of the International Conference on Operations Research (OR 2011), August 30, 2011
Proceedings of the Federated Conference on Computer Science and Information Systems, 2011
Exploring the Prefetcher/Memory Controller Design Space: An Opportunistic Prefetch Scheduling Strategy.
Proceedings of the Architecture of Computing Systems - ARCS 2011, 2011
2010
Proceedings of the International Conference on Computational Science, 2010
Proceedings of the 22st International Symposium on Computer Architecture and High Performance Computing, 2010
DIEF: An Accurate Interference Feedback Mechanism for Chip Multiprocessor Memory Systems.
Proceedings of the High Performance Embedded Architectures and Compilers, 2010
Multi-level Hardware Prefetching Using Low Complexity Delta Correlating Prediction Tables with Partial Matching.
Proceedings of the High Performance Embedded Architectures and Compilers, 2010
2009
Experimental Validation of the Learning Effect for a Pedagogical Game on Computer Fundamentals.
IEEE Trans. Educ., 2009
Comput. Appl. Eng. Educ., 2009
A Quantitative Study of Memory System Interference in Chip Multiprocessor Architectures.
Proceedings of the 11th IEEE International Conference on High Performance Computing and Communications, 2009
Proceedings of the 6th Conference on Computing Frontiers, 2009
2008
Proceedings of the 26th International Conference on Computer Design, 2008
Proceedings of the Euro-Par 2008 Workshops, 2008
2007
An LRU-based replacement algorithm augmented with frequency of access in shared chip-multiprocessor caches.
SIGARCH Comput. Archit. News, 2007
2006
J. Embed. Comput., 2006
Proceedings of the High Performance Computing, 2006
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006
Proceedings of the Architecture of Computing Systems, 2006
2004
Proceedings of the 9th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, 2004
2001
Experience from a 450 Students/Year Course on Digital Logic and Computer Fundamentals using FPGAs and mu-Controllers.
Proceedings of the 2001 International Conference on Microelectronics Systems Education, 2001
Proceedings of the High-Performance Computing and Networking, 9th International Conference, 2001
1994
Compile and Runtime Padding: An Approach to Realising Synchronous MIMD Execution.
Proceedings of the Technology and Foundations - Information Processing '94, Volume 1, Proceedings of the IFIP 13th World Computer Congress, Hamburg, Germany, 28 August, 1994
1990
Proceedings of the Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990, 1990