Lev Kirischian
Orcid: 0000-0002-3836-6281
According to our database1,
Lev Kirischian
authored at least 31 papers
between 2000 and 2021.
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Bibliography
2021
A Decision-Making Method Providing Sustainability to FPGA-Based SoCs by Run-Time Structural Adaptation to Mode of Operation, Power Budget, and Die Temperature Variations.
Int. J. Reconfigurable Comput., 2021
A Method for Run-Time Prediction of On-Chip Thermal Conditions in Dynamically Reconfigurable SOPCs.
Int. J. Reconfigurable Comput., 2021
2020
A Unified Method of Designing Signature Analyzers for Digital and Mixed-Signal Circuits Testing.
Proceedings of the IEEE International Test Conference, 2020
2019
On-Chip Thermal Balancing using Dynamic Structural Adaptation of FPGA-Based Multi-task SoPCs for Space-Borne Applications.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2019
2018
Run-Time Mitigation of Power Budget Variations and Hardware Faults by Structural Adaptation of FPGA-Based Multi-Modal SoPC.
Comput., 2018
Mitigation of Thermo-cycling effects in Flip-chip FPGA-based Space-borne Systems by Cyclic On-chip Task Relocation.
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018
2017
Architecture Reconfiguration as a Mechanism for Sustainable Performance of Embedded Systems in case of Variations in Available Power.
Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017
Run-time adaptation method for mitigation of hardware faults and power budget variations in space-borne FPGA-based systems.
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017
2016
SoPC Self-Integration Mechanism for Seamless Architecture Adaptation to Stream Workload Variations.
IEEE Trans. Very Large Scale Integr. Syst., 2016
Run-Time Recovery Mechanism for Transient and Permanent Hardware Faults Based on Distributed, Self-Organized Dynamic Partially Reconfigurable Systems.
IEEE Trans. Computers, 2016
2015
Mitigation of variations in environmental conditions by SoPC architecture adaptation.
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015
2014
VLSI Design, 2014
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
Decentralized run-time recovery mechanism for transient and permanent hardware faults for space-borne FPGA-based computing systems.
Proceedings of the 2014 NASA/ESA Conference on Adaptive Hardware and Systems, 2014
2013
SoC self-integration mechanism for dynamic reconfigurable systems based on collaborative macro-function units.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013
2012
Cost-performance analysis of component architectural designs for Dynamic Partially Reconfigurable Systems.
Proceedings of the 25th IEEE Canadian Conference on Electrical and Computer Engineering, 2012
A framework for adaptive reconfigurable space-borne computing platforms for run-time self-recovery from transient and permanent hardware faults.
Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012
2010
Int. J. Reconfigurable Comput., 2010
A framework of embedded reconfigurable systems based on re-locatable virtual components.
Int. J. Embed. Syst., 2010
Architecture synthesis methodology for cost-effective run-time reconfigurable systems.
Int. J. Embed. Syst., 2010
2009
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009
Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, 2009
Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, 2009
2008
Macro-programmable reconfigurable stream processor for collaborative manufacturing systems.
J. Intell. Manuf., 2008
Improving Cost-Effectiveness Using a Micro-level Static Architecture for Stream Applications.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008
Proceedings of the 5th Conference on Computing Frontiers, 2008
2006
A Framework for a Dynamically Reconfigurable System in a Parallel Multi-Tasking Environment.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
2004
Re-Configurable Parallel Stream Processor with Self-Assembling and Self-Restorable Micro-Architecture.
Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004
2002
Architecture-to-Task Optimization System (ATOS) for Parallel Multi-Mode Data-Flow Architectures on a Base of a Partially Reconfigurable Computing Platform.
Proceedings of the 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 2002
2000
Implementation of an Adaptive Reconfigurable Group Organized (ARGO) Parallel Architecture.
Proceedings of the 2000 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2000), 2000
Optimization of Parallel Task Execution on the Adaptive Reconfigurable Group Organized Computing System.
Proceedings of the 2000 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2000), 2000