Lok-Won Kim

This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.

Bibliography

2023
Runtime Testability on Autonomous System.
IEEE Trans. Reliab., March, 2023

Integrated Optimization in Training Process for Binary Neural Network.
Proceedings of the International Conference on Information Networking, 2023

MST-compression: Compressing and Accelerating Binary Neural Networks with Minimum Spanning Tree.
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023

2022
A Deep Learning Accelerator Based on a Streaming Architecture for Binary Neural Networks.
IEEE Access, 2022

2020
An IoT Hardware Platform Architecture for Monitoring Power Grid Systems Based on Heterogeneous Multi-Sensors.
Sensors, 2020

Cost-Efficient Super-Resolution Hardware Using Local Binary Pattern Classification and Linear Mapping for Real-Time 4K Conversion.
IEEE Access, 2020

ERDNN: Error-Resilient Deep Neural Networks With a New Error Correction Layer and Piece-Wise Rectified Linear Unit.
IEEE Access, 2020

2019
Towards Coexistence of Cellular and WiFi Networks in Unlicensed Spectrum: A Neural Networks Based Approach.
IEEE Access, 2019

2018
DeepX: Deep Learning Accelerator for Restricted Boltzmann Machine Artificial Neural Networks.
IEEE Trans. Neural Networks Learn. Syst., 2018

2015
Dynamic Function Verification for System on Chip Security Against Hardware-Based Attacks.
IEEE Trans. Reliab., 2015

Automated Iterative Pipelining for ASIC Design.
ACM Trans. Design Autom. Electr. Syst., 2015

Bit-Width Optimization by Divide-and-Conquer for Fixed-Point Digital Signal Processing Systems.
IEEE Trans. Computers, 2015

2014
A Fully Pipelined FPGA Architecture of a Factored Restricted Boltzmann Machine Artificial Neural Network.
ACM Trans. Reconfigurable Technol. Syst., 2014

Dynamic Function Replacement for System-on-Chip Security in the Presence of Hardware-Based Attacks.
IEEE Trans. Reliab., 2014

2012
Precision-Aware Self-Quantizing Hardware Architectures for the Discrete Wavelet Transform.
IEEE Trans. Image Process., 2012

2011
A System-On-Chip Bus Architecture for Thwarting Integrated Circuit Trojan Horses.
IEEE Trans. Very Large Scale Integr. Syst., 2011

2002
A control network architecture based on EIA-709.1 protocol for power line data communications.
IEEE Trans. Consumer Electron., 2002


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