Lorenzo Verdoscia

According to our database, Lorenzo Verdoscia authored at least 14 papers between 1989 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2019

A Data-Flow Methodology for Accelerating FFT.

Lorenzo Verdoscia, Amin Sahebi, Roberto Giorgi

Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

2015

A matrix multiplier case study for an evaluation of a configurable dataflow-machine.

Lorenzo Verdoscia, Roberto Vaccaro, Roberto Giorgi

Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2012

D³AS project: a different approach to the manycore challenges.

Lorenzo Verdoscia, Roberto Vaccaro

Proceedings of the Computing Frontiers Conference, CF'12, 2012

2005

CODACS Prototype: A Platform-Processor for CHIARA Programs.

Lorenzo Verdoscia

Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

Message from the Chairs.

Lorenzo Verdoscia, Laurence Tianruo Yang, Ricky Yu-Kwong Kwok, John O'Donnell

Proceedings of the 34th International Conference on Parallel Processing Workshops (ICPP 2005 Workshops), 2005

Image Processing Chain for Digital Still Cameras Based on the SIMPil Architecture.

Antonio Gentile, Salvatore Vitabile, Lorenzo Verdoscia, Filippo Sorbello

Proceedings of the 34th International Conference on Parallel Processing Workshops (ICPP 2005 Workshops), 2005

2004

CODACS Project: A Development Tool for Embedded System Prototyping.

Lorenzo Verdoscia

Proceedings of the Embedded Software and Systems, First International Conference, 2004

CODACS Prototype: CHIARA Language and Its Compilers.

Lorenzo Verdoscia, Marco Danelutto, Raffaele Esposito

Proceedings of the 24th International Conference on Distributed Computing Systems Workshops (ICDCS 2004 Workshops), 2004

2003

CODACS Project: Level-Node Communication Policies.

Lorenzo Verdoscia, Umberto Scafuri

Proceedings of the 11th Euromicro Workshop on Parallel, 2003

2002

CODACS Project: A Demand-Data Driven Reconfigurable Architecture (Research Note).

Lorenzo Verdoscia

Proceedings of the Euro-Par 2002, 2002

1999

An Adaptive Routing Algorithm for WK-Recursive Topologies.

Lorenzo Verdoscia, Roberto Vaccaro

Computing, 1999

1998

A High-Level Dataflow System.

Lorenzo Verdoscia, Roberto Vaccaro

Computing, 1998

1989

HCRC-Parallel computer: A massively parallel combined architecture supercomputer.

E. Binaghi, Giacomo R. Sechi, Roberto Vaccaro, Lorenzo Verdoscia

Microprocess. Microprogramming, 1989

A computing unit for FFP function evaluation in support of correctness proofs.

Monica Alderighi, Giacomo R. Sechi, Roberto Vaccaro, Lorenzo Verdoscia

Proceedings of the 22nd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1989