Ludo Weyten

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

A 14-bit 250MS/s digital to analog converter with binary weighted Redundant Signed Digit coding.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

Web-Based Trainer for Electrical Circuit Analysis.

[BibT_eX]

[DOI]

IEEE Trans. Educ., 2009

Nyquist-criterion based design of a CT SigmaDelta-ADC with a reduced number of comparators.

[BibT_eX]

[DOI]

Integr., 2009

2008

An Unconstrained Architecture for Systematic Design of Higher Order SigmaDelta Force-Feedback Loops.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

An On-Line Calibration Technique for Mismatch Errors in High-Speed DACs.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Redundant signed digit coding in binary weighted DACs.

[BibT_eX]

[DOI]

Benoit Catteau

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007

Mismatch Insensitive Double-Sampling Quadrature Bandpass SigmaDelta Modulation.

[BibT_eX]

[DOI]

Stijn Reekmans

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Efficient Multibit Quantization in Continuous-Time Sigma Delta Modulators.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

A delay-based complex double-sampled resonator for use in ƒ<i><sub>s</sub></i>/4 quadrature bandpass ΣΔ modulators.

[BibT_eX]

[DOI]

Stijn Reekmans

IEICE Electron. Express, 2007

Quadrature Mismatch Shaping Techniques for Fully Differential Circuits.

[BibT_eX]

[DOI]

Stijn Reekmans

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

An Unconstrained Architecture for High-Order Sigma Delta Force-Feedback Inertial Sensors.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A Digital Calibration Technique for the Correction of Glitches in High-Speed DAC's.

[BibT_eX]

[DOI]

Benoit Catteau

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Quadrature Mismatch Shaping for Digital-to-Analog Converters.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Quadrature mismatch shaping with a complex, tree structured DAC.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Nyquist criterion based design of continuous time Sigma Delta modulators.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Quadrature Mismatch Shaping with a Complex, Data Directed Swapper.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on Electronics, 2006

Nyquist-criterion based design of a CT ΣΔ-ADC with a reduced number of comparators.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

Design of double-sampling ΣΔ modulation A/D converters with bilinear integrators.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

A versatile Nyquist-rate A/D converter with 16-18 bit performance for sensor readout applications.

[BibT_eX]

[DOI]

Integr., 2005

STF behaviour in a CT ΔΣ modulator.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on Electronics, 2005

2004

Systematic design of double-sampling ΣΔ A/D converters with a modified noise transfer function.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2004

A double-sampling extended-counting ADC.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2004

Systematic design of double-sampling Sigma Delta ADC's with modified NTF.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Addressing static and dynamic errors in bandpass unit element multibit DAC's.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

An approach to tackle quantization noise folding in double-sampling ΣΔ modulation A/D converters.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2003

A 250-kHz 94-dB double-sampling ΣΔ modulation A/D converter with a modified noise transfer function.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2003

2002

An efficient technique to eliminate quantisation noise folding in double-sampling Sigma-Delta modulators.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001

Composite functions in an orthogonal polynomial base.

[BibT_eX]

[DOI]

Signal Process., 2001

A 13.5-b 1.2-V micropower extended counting A/D converter.

[BibT_eX]

[DOI]

Wim De Wilde

IEEE J. Solid State Circuits, 2001

2000

Time domain adaptive delay estimation.

[BibT_eX]

[DOI]

IEEE Trans. Signal Process., 2000

1999

On noise suppression in adaptive delay estimation.

[BibT_eX]

[DOI]

Proceedings of the ISSPA '99. Proceedings of the Fifth International Symposium on Signal Processing and its Applications, 1999

Adaptive fractional delay estimation without lock-up.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1998

Dynamic element matching for pipelined A/D conversion.

[BibT_eX]

[DOI]

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1990

Multiple storage adaptive multi-trees.

[BibT_eX]

[DOI]

Wim De Pauw

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990

1989

Performance prediction for adaptive quad tree graphical data structures.

[BibT_eX]

[DOI]

Wim De Pauw

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

Quad list quad trees: a geometrical data structure with improved performance for large region queries.

[BibT_eX]

[DOI]