Xinpeng Xing

Orcid: 0000-0002-5535-9577

According to our database1, Xinpeng Xing authored at least 33 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
A 600 MHz-BW 154.3 dB-FoM current-mode continuous-time pipelined ADC in 12 nm CMOS.
Microelectron. J., December, 2023

A fully-digital calibration algorithm for VCO-based ADC.
Microelectron. J., September, 2023

2022
Wideband Continuous-Time MASH Delta-Sigma Modulators: A Tutorial Review.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Single Chain 800M/1.8G/2.4GHz Multistandard Transceiver With Multibranch Transformer for Low-Cost IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Low Frequency Drift LC-DCO with Wide Temperature Range.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

A 4 to 5GHz Digitally Controlled Ring Oscillator with 100kHz Resolution using Noise Cancellation Technology in 40nm CMOS.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

An 8-b 8-GS/s Time-Interleaved SAR ADC With Foreground Offset Calibration in 28nm CMOS.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

Low Power and High Speed Designs of CIC Filter for Sigma-Delta ADCs.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021
Multilabel Deep Learning-Based Side-Channel Attack.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

A Wireless High-Sensitivity Fetal Heart Sound Monitoring System.
Sensors, 2021

A 0-dB STF-Peaking 85-MHz BW 74.4-dB SNDR CT ΔΣ ADC With Unary-Approximating DAC Calibration in 28-nm CMOS.
IEEE J. Solid State Circuits, 2021

Power-efficient VCO-based ADCs for Wireless Communication Systems.
Proceedings of the 18th International SoC Design Conference, 2021

An Area-Saving Balun for Multiband IoT Transmitter.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 2GS/s 12bit Time-Interleaved Pipelined ADC in 40nm CMOS.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A Charge Pump with Perfect Current Matching Applied to Phase-Locked Loop in 65nm CMOS.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

A 10bit 1.6GS/s Current-steering DAC in 40nm CMOS.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

2020
Eulerian Motion Based 3DCNN Architecture for Facial Micro-Expression Recognition.
Proceedings of the MultiMedia Modeling - 26th International Conference, 2020

2019
An 85-MHz-BW ASAR-Assisted CT 4-0 MASH $\Delta\Sigma$ Modulator With Background Half-Range Dithering-Based DAC Calibration in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A Power Mixer Based Dual-Band Transmitter for NB-IoT Applications.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A 0.9/1.8/2.4GHz-reconfigurable LNA with Inductor and Capacitor Tuning for IoT Application in 65nm CMOS.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

Multi-label Deep Learning based Side Channel Attack.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2019

2018
An 85MHz-BW 68.5dB-SNDR ASAR-assisted CT 4-0 MASH ΔΣ modulator with half-range dithering-based DAC calibration in 28nm CMOS.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
A power-efficient reconfigurable two-step VCO-based ADC for software-defined radio.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

A 20Mbps 5.8mw QPSK transmitter based on injection locking and Class-E PA for wireless biomedical applications.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2015
A 40-MHz Bandwidth 0-2 MASH VCO-Based Delta-Sigma ADC With 35-fJ/Step FoM.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A 42 fJ/Step-FoM Two-Step VCO-Based Delta-Sigma ADC in 40 nm CMOS.
IEEE J. Solid State Circuits, 2015

A lowpass/bandpass reconfigurable continuous-time ΔΣ ADC for software-defined radio.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
A 40MHz-BW 35fJ/step-FoM nonlinearity-cancelling two-step ADC with dual-input VCO-based quantizer.
Proceedings of the ESSCIRC 2014, 2014

2013
Calibration of DAC Mismatch Errors in ΣΔ ADCs Based on a Sine-Wave Measurement.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Environmental efficiency of industrial sectors in China: An improved weighted SBM model.
Math. Comput. Model., 2013

A 40MHz-BW two-step open-loop VCO-based ADC with 42fJ/step FoM in 40nm CMOS.
Proceedings of the ESSCIRC 2013, 2013

2012
Design of an intrinsically-linear double-VCO-based ADC with 2<sup>nd</sup>-order noise shaping.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
A 40MHz 12bit 84.2dB-SFDR continuous-time delta-sigma modulator in 90nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011


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