M. Wasiur Rashid

According to our database, M. Wasiur Rashid authored at least 4 papers between 2005 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2008

Supporting highly-decoupled thread-level redundancy for parallel programs.

M. Wasiur Rashid, Michael C. Huang

Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008

2006

Slackened Memory Dependence Enforcement: Combining Opportunistic Forwarding with Decoupled Verification.

Alok Garg, M. Wasiur Rashid, Michael C. Huang

Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006

2005

Power-Efficient Error Tolerance in Chip Multiprocessors.

M. Wasiur Rashid, Edwin J. Tan, Michael C. Huang, David H. Albonesi

IEEE Micro, 2005

Exploiting Coarse-Grain Verification Parallelism for Power-Efficient Fault Tolerance.

M. Wasiur Rashid, Edwin J. Tan, Michael C. Huang, David H. Albonesi

Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 2005