M. Wasiur Rashid

According to our database1, M. Wasiur Rashid authored at least 4 papers between 2005 and 2008.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2008
Supporting highly-decoupled thread-level redundancy for parallel programs.
Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008

2006
Slackened Memory Dependence Enforcement: Combining Opportunistic Forwarding with Decoupled Verification.
Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006

2005
Power-Efficient Error Tolerance in Chip Multiprocessors.
IEEE Micro, 2005

Exploiting Coarse-Grain Verification Parallelism for Power-Efficient Fault Tolerance.
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 2005


  Loading...