Edwin J. Tan

According to our database, Edwin J. Tan authored at least 5 papers between 2003 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2007

A CMOS Image Sensor with Focal Plane Discrete Cosine Transform Computation.

Edwin J. Tan, Zeljko Ignjatovic, Mark F. Bocko

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005

Power-Efficient Error Tolerance in Chip Multiprocessors.

M. Wasiur Rashid, Edwin J. Tan, Michael C. Huang, David H. Albonesi

IEEE Micro, 2005

QUILT: a GUI-based integrated circuit floorplanning environment for computer architecture research and education.

Gregory J. Briggs, Edwin J. Tan, Nicholas A. Nelson, David H. Albonesi

Proceedings of the 2005 workshop on Computer architecture education, 2005

Exploiting Coarse-Grain Verification Parallelism for Power-Efficient Fault Tolerance.

M. Wasiur Rashid, Edwin J. Tan, Michael C. Huang, David H. Albonesi

Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 2005

2003

DSP architectures: past, present and futures.

Edwin J. Tan, Wendi Beth Heinzelman

SIGARCH Comput. Archit. News, 2003