Edwin J. Tan

According to our database1, Edwin J. Tan authored at least 5 papers between 2003 and 2007.

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Timeline

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Bibliography

2007
A CMOS Image Sensor with Focal Plane Discrete Cosine Transform Computation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005
Power-Efficient Error Tolerance in Chip Multiprocessors.
IEEE Micro, 2005

QUILT: a GUI-based integrated circuit floorplanning environment for computer architecture research and education.
Proceedings of the 2005 workshop on Computer architecture education, 2005

Exploiting Coarse-Grain Verification Parallelism for Power-Efficient Fault Tolerance.
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 2005

2003
DSP architectures: past, present and futures.
SIGARCH Computer Architecture News, 2003


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