Mahadevamurty Nemani

According to our database, Mahadevamurty Nemani authored at least 6 papers between 1996 and 2000.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2000

Macro-driven circuit design methodology for high-performance datapaths.

Mahadevamurty Nemani, Vivek Tiwari

Proceedings of the 37th Conference on Design Automation, 2000

1998

High-Level Power Estimation

Mahadevamurty Nemani

PhD thesis, 1998

Delay Estimation VLSI Circuits from a High-Level View.

Mahadevamurty Nemani, Farid N. Najm

Proceedings of the 35th Conference on Design Automation, 1998

1997

High-level area and power estimation for VLSI circuits.

Mahadevamurty Nemani, Farid N. Najm

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1996

Towards a high-level power estimation capability [digital ICs].

Mahadevamurty Nemani, Farid N. Najm

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

High-level power estimation and the area complexity of Boolean functions.

Mahadevamurty Nemani, Farid N. Najm

Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996