Mahmood Rafiee
Orcid: 0000-0003-1585-6859
According to our database1,
Mahmood Rafiee
authored at least 10 papers
between 2020 and 2023.
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Bibliography
2023
High-efficient and error-resilient gate diffusion input-based approximate full adders for complex multistage rapid structures.
Comput. Electr. Eng., July, 2023
Voltage over-scaling CNT-based 8-bit multiplier by high-efficient GDI-based counters.
IET Comput. Digit. Tech., January, 2023
2022
An efficient counter-based Wallace-tree multiplier with a hybrid full adder core for image blending.
Frontiers Inf. Technol. Electron. Eng., 2022
SR-GDI CNTFET-based magnitude comparator for new generation of programmable integrated circuits.
Int. J. Circuit Theory Appl., 2022
Tolerant and low power subtractor with 4: 2 compressor and a new TG-PTL-float full adder cell.
IET Circuits Devices Syst., 2022
High-Performance 1-Bit Full Adder With Excellent Driving Capability for Multistage Structures.
IEEE Embed. Syst. Lett., 2022
Low-Power and Fast-Swing-Restoration GDI-Based Magnitude Comparator for Digital Images Processing.
Circuits Syst. Signal Process., 2022
2021
An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications.
Microelectron. J., 2021
2020
High-Efficient, Ultra-Low-Power and High-Speed 4: 2 Compressor with a New Full Adder Cell for Bioelectronics Applications.
Circuits Syst. Signal Process., 2020
Comput. Electr. Eng., 2020