Nabiollah Shiri
Orcid: 0000-0003-4683-1814
According to our database1,
Nabiollah Shiri
authored at least 21 papers
between 2020 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
IEEE Embed. Syst. Lett., March, 2024
An adaptive neuro-fuzzy inference system optimized by genetic algorithm for brain tumour detection in magnetic resonance images.
IET Image Process., 2024
2023
High-efficient reversible full adder realized by dynamic threshold-based gate diffusion input logics.
Microelectron. J., December, 2023
High-efficient and error-resilient gate diffusion input-based approximate full adders for complex multistage rapid structures.
Comput. Electr. Eng., July, 2023
A 38.5-fJ 14.4-ns Robust and Efficient Subthreshold-to-Suprathreshold Voltage-Level Shifter Comprising Logic Mismatch-Activated Current Control Circuit.
IEEE Trans. Circuits Syst. II Express Briefs, June, 2023
Imprecise Subtractor Using a New Efficient Approximate-Based Gate Diffusion Input Full Adder for Bioimages Processing.
Comput. Electr. Eng., May, 2023
High Efficient GDI-CNTFET-Based Approximate Full Adder for Next Generation of Computer Architectures.
IEEE Embed. Syst. Lett., March, 2023
Brain tumour detection in magnetic resonance imaging using Levenberg-Marquardt backpropagation neural network.
IET Image Process., January, 2023
Voltage over-scaling CNT-based 8-bit multiplier by high-efficient GDI-based counters.
IET Comput. Digit. Tech., January, 2023
Efficient GDI-based approximate subtractors for change detection in bio-image processing applications.
Microelectron. J., 2023
Efficient and optimized approximate GDI full adders based on dynamic threshold CNTFETs for specific least significant bits.
Frontiers Inf. Technol. Electron. Eng., 2023
A high-efficient imprecise discrete cosine transform block based on a novel full adder and Wallace multiplier for bioimages compression.
Int. J. Circuit Theory Appl., 2023
2022
An efficient counter-based Wallace-tree multiplier with a hybrid full adder core for image blending.
Frontiers Inf. Technol. Electron. Eng., 2022
SR-GDI CNTFET-based magnitude comparator for new generation of programmable integrated circuits.
Int. J. Circuit Theory Appl., 2022
Tolerant and low power subtractor with 4: 2 compressor and a new TG-PTL-float full adder cell.
IET Circuits Devices Syst., 2022
High-Performance 1-Bit Full Adder With Excellent Driving Capability for Multistage Structures.
IEEE Embed. Syst. Lett., 2022
Low-Power and Fast-Swing-Restoration GDI-Based Magnitude Comparator for Digital Images Processing.
Circuits Syst. Signal Process., 2022
2021
An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications.
Microelectron. J., 2021
2020
IET Image Process., 2020
High-Efficient, Ultra-Low-Power and High-Speed 4: 2 Compressor with a New Full Adder Cell for Bioelectronics Applications.
Circuits Syst. Signal Process., 2020
Comput. Electr. Eng., 2020