Mamoru Ishizaka

According to our database, Mamoru Ishizaka authored at least 3 papers between 2018 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Robust Fault-Tolerant Design Based on Checksum and On-Line Testing for Memristor Neural Network.

Michihiro Shintani, Mamoru Ishizaka, Michiko Inoue

Proceedings of the 30th IEEE Asian Test Symposium, 2021

2020

Area-Efficient and Reliable Error Correcting Code Circuit Based on Hybrid CMOS/Memristor Circuit.

Mamoru Ishizaka, Michihiro Shintani, Michiko Inoue

J. Electron. Test., 2020

2018

Area-Efficient and Reliable Hybrid CMOS/Memristor ECC Circuit for ReRAM Storage.

Mamoru Ishizaka, Michihiro Shintani, Michiko Inoue

Proceedings of the 27th IEEE Asian Test Symposium, 2018