Manas Kumar Hati
Orcid: 0000-0003-2336-3405
According to our database1,
Manas Kumar Hati
authored at least 12 papers
between 2011 and 2019.
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Bibliography
2019
A constant loop bandwidth in delta sigma fractional-N PLL frequency synthesizer with phase noise cancellation.
Integr., 2019
2018
Phase noise analysis of proposed PFD and CP switching circuit and its advantages over various PFD/CP switching circuits in phase-locked loops.
Integr., 2018
A New Open Loop Linearization Technique for Power Amplifier Circuit in MMIC for 5G Wireless Backhaul Application.
Proceedings of the TENCON 2018, 2018
Proceedings of the TENCON 2018, 2018
2017
A fast and efficient constant loop bandwidth with proposed PFD and pulse swallow divider circuit in ΔΣ fractional-N PLL frequency synthesizer.
Microelectron. J., 2017
2016
A fast automatic frequency and amplitude control LC-VCO circuit with noise filtering technique for a fractional-N PLL frequency synthesizer.
Microelectron. J., 2016
2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
A 10-b, 500 MSPS current steering CMOS DAC with a switching current cell and high SFDR value.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2013
A high o/p resistance, wide swing and perfect current matching charge pump having switching circuit for PLL.
Microelectron. J., 2013
2012
Proceedings of the 25th International Conference on VLSI Design, 2012
A High Speed, Low Jitter and Fast Acquisition CMOS Phase Frequency Detector for Charge Pump PLL.
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012
2011
Design of a Low Power, High Speed Complementary Input Folded Regulated Cascode OTA for a Parallel Pipeline ADC.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011