Manfred Mücke

Orcid: 0000-0002-3960-4296

According to our database1, Manfred Mücke authored at least 14 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
Extended Rayleigh-Ritz Autoencoder with Distribution-Free Statistics.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2024

2022
Compressed Hierarchical Representations for Multi-Task Learning and Task Clustering.
Proceedings of the International Joint Conference on Neural Networks, 2022

2021
Understanding Cache Boundness of ML Operators on ARM Processors.
CoRR, 2021

2018
A New Approach using Characteristic Video Signals to Improve the Stability of Manufacturing Processes.
Proceedings of the 2018 Digital Image Computing: Techniques and Applications, 2018

2017
Linking Application Description with Efficient SIMD Code Generation for Low-Precision Signed-Integer GEMM.
Proceedings of the Euro-Par 2017: Parallel Processing Workshops, 2017

2013
Holistic Biquadratic IIR Filter Design for Communication Systems Using Differential Evolution.
J. Electr. Comput. Eng., 2013

2012
Evaluation of the Stretch S6 Hybrid Reconfigurable Embedded CPU Architecture for Power-Efficient Scientific Computing.
Proceedings of the International Conference on Computational Science, 2012

Bayesian Network Classifiers with Reduced Precision Parameters.
Proceedings of the Machine Learning and Knowledge Discovery in Databases, 2012

2011
Effects of Reduced Precision on Floating-Point SVM Classification Accuracy.
Proceedings of the International Conference on Computational Science, 2011

Native Double Precision LINPACK Implementation on a Hybrid Reconfigurable CPU.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

Maximum margin structure learning of Bayesian network classifiers.
Proceedings of the IEEE International Conference on Acoustics, 2011

2010
Evidence-based custom-precision estimation with applications to solving nonlinear approximation problems.
Proceedings of the IEEE International Conference on Acoustics, 2010

Peak Performance Model for a Custom Precision Floating-Point Dot Product on FPGAs.
Proceedings of the Euro-Par 2010 Parallel Processing Workshops, 2010

2006
A Bitwidth-aware HDL Extension.
Proceedings of the Forum on specification and Design Languages, 2006


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