Manoj B. Rajashekar

According to our database, Manoj B. Rajashekar authored at least 4 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

HiSpMM: High Performance High Bandwidth Sparse-Dense Matrix Multiplication on HBM-equipped FPGAs.

Ahmad Sedigh Baroughi, Manoj B. Rajashekar, Akhil Raj Baranwal, Zhenman Fang

ACM Trans. Reconfigurable Technol. Syst., March, 2026

2025

MAD-HiSpMV: Matrix Adaptive Design with Hybrid Row Distribution for Imbalanced SpMV Acceleration on FPGAs.

Manoj B. Rajashekar, Akhil Raj Baranwal, Xingyu Tian, Zhenman Fang

ACM Trans. Reconfigurable Technol. Syst., December, 2025

2024

HiTC: High-Performance Triangle Counting on HBM-Equipped FPGAs Using HLS.

Junzhe Liang, Manoj B. Rajashekar, Xingyu Tian, Zhenman Fang

Proceedings of the IEEE Pacific Rim Conference on Communications, 2024

HiSpMV: Hybrid Row Distribution and Vector Buffering for Imbalanced SpMV Acceleration on FPGAs.

Manoj B. Rajashekar, Xingyu Tian, Zhenman Fang

Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024