Manuel G. Gericota

Orcid: 0000-0001-9774-816X

According to our database1, Manuel G. Gericota authored at least 32 papers between 1993 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
EOLES Course - Five Years of Remote Learning and Experimenting.
Proceedings of the Cross Reality and Data Science in Engineering, 2020

e-Engineering Education: Issues and Perspectives for Higher Education Institutions.
Proceedings of the Cross Reality and Data Science in Engineering, 2020

Recent activities by IEEE Education Society Portugal Chapter.
Proceedings of the 2020 IEEE Global Engineering Education Conference, 2020

2019
e-Engineering: engineering school at home without compromise.
Proceedings of the 18th International Conference on Information Technology Based Higher Education and Training, 2019

e-Engineering: Remote Labs in an Electronics and Optics e-Learning for Embedded Systems Course.
Proceedings of the 2019 5th Experiment International Conference (exp.at'19), 2019

The e-LIVES Project: e-Engineering Where and When Students Need.
Proceedings of the IEEE Global Engineering Education Conference, 2019

2018
e-LIVES - Extending e-Engineering Along the South and Eastern Mediterranean Basin.
Proceedings of the Smart Industry & Smart Education, 2018

2015
EOLES project...teaching unit experiences.
Proceedings of the 3rd International Conference on Technological Ecosystems for Enhancing Multiculturality, 2015

EOLES course the first accredited on-line degree course in electronics and optics for embedded systems.
Proceedings of the IEEE Global Engineering Education Conference, 2015

2014

2012
Hey Fellows, We Shrunk the Server.
Int. J. Online Eng., 2012

Gatewaying IEEE 1149.1 and IEEE 1149.7 test access ports.
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

2011
Real-time fault injection using enhanced on-chip debug infrastructures.
Microprocess. Microsystems, 2011

2010
An Integrated Reusable Remote Laboratory to Complement Electronics Teaching.
IEEE Trans. Learn. Technol., 2010

2009
Using test infrastructures for (remote) online evaluation of the sensitivity to SEUs of FPGAs.
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

2008
Reliability and Availability in Reconfigurable Computing: A Basis for a Common Solution.
IEEE Trans. Very Large Scale Integr. Syst., 2008

A comparative analysis of fault injection methods via enhanced on-chip debug infrastructures.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

2007
On-Line Self-Healing of Circuits Implemented on Reconfigurable FPGAs.
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

A Framework for Self-Healing Radiation-Tolerant Implementations on Reconfigurable FPGAs.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006
Using NEXUS compliant debuggers for real time fault injection on microprocessors.
Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006

A Framework for Fault Tolerant Real Time Systems Based on Reconfigurable FPGAs.
Proceedings of 11th IEEE International Conference on Emerging Technologies and Factory Automation, 2006

A New Approach to Assess Defragmentation Strategies in Dynamically Reconfigurable FPGAs.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

2005
A self-healing real-time system based on run-time self-reconfiguration.
Proceedings of 10th IEEE International Conference on Emerging Technologies and Factory Automation, 2005

2003
Run-Time Management of Logic Resources on Reconfigurable Systems.
Proceedings of the 2003 Design, 2003

2002
Dynamic Replication: The Core of a Truly Non-Intrusive SRAM-based FPGA Structural Concurrent Test Methodology.
Proceedings of the 3rd Latin American Test Workshop, 2002

Active Replication: Towards a Truly SRAM-Based FPGA On-Line Concurrent Testing.
Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002

On-line Defragmentation for Run-Time Partially Reconfigurable FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2002

A Novel Methodology for the Concurrent Test of Partial and Dynamically Reconfigurable SRAM-Based FPGAs.
Proceedings of the 2002 Design, 2002

2001
Dynamically Rotate And Free for Test: The Path for FPGA Concurrent Test.
Proceedings of the 2nd Latin American Test Workshop, 2001

DRAFT: An On-Line Fault Detection Method for Dynamic and Partially Reconfigurable FPGAs.
Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001

1993
BIST for 1149.1-Compatible Boards: A Low-Cost and Maximum-Flexibility Solution.
Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

An HDL approach to board-level BIST.
Proceedings of the European Design Automation Conference 1993, 1993


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