Marcelo Tosini

According to our database¹, Marcelo Tosini authored at least 3 papers between 2021 and 2026.

Collaborative distances:

Timeline

Book In proceedings Article PhD thesis Dataset Other

2026

Optimal Design of IEEE-754 Decimal Floating-Point Multipliers in FPGAs for DPD and BID Encoding.

[DOI]

Circuits Syst. Signal Process., April, 2026

2024

Analysis and efficient implementation of IEEE-754 decimal floating point adders/subtractors in FPGAs for DPD and BID encoding.

[DOI]

J. Supercomput., May, 2024

2021

Radix-10 Restoring Square Root for 6-input LUTs Programmable Devices.

[DOI]

Circuits Syst. Signal Process., 2021