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Martín Vázquez

Affiliations:
  • National University of Central Buenos Aires (UNICEN), LabSET-INTIA, Tandil, Argentina
  • FASTA University, Faculty of Engineering, Buenos Aires, Argentina


According to our database1, Martín Vázquez authored at least 12 papers between 2009 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Analysis and efficient implementation of IEEE-754 decimal floating point adders/subtractors in FPGAs for DPD and BID encoding.
[BibTeX]
[DOI]
Marcelo Tosini
,
Martín Vázquez
,
Lucas Leiva
J. Supercomput., May, 2024

Automatic Fecal Eggs Counting in Ruminants Using Xilinx DPU.
[BibTeX]
[DOI]
Lucas Leiva
,
Bruno Constanzo
,
Martín Vázquez
,
Juan Manuel Toloza
IEEE Embed. Syst. Lett., March, 2024

2023
FPGA-Based Accelerator for AI-Toolbox Reinforcement Learning Library.
[BibTeX]
[DOI]
Lucas Leiva
,
Jordina Torrents-Barrena
,
Martín Vázquez
IEEE Embed. Syst. Lett., June, 2023

2022
FPGA acceleration analysis of LibSVM predictors based on high-level synthesis.
[BibTeX]
[DOI]
Lucas Leiva
,
Martín Vázquez
,
Jordina Torrents-Barrena
J. Supercomput., 2022

2021
Radix-10 Restoring Square Root for 6-input LUTs Programmable Devices.
[BibTeX]
[DOI]
Martín Vázquez
,
Marcelo Tosini
,
Lucas Leiva
Circuits Syst. Signal Process., 2021

2019
Radix-10 decimal logarithm by direct selection for 6-input LUTs programmable devices.
[BibTeX]
[DOI]
Martín Vázquez
,
Lucas Leiva
,
Gustavo Sutter
Microprocess. Microsystems, 2019

2016
Real-time speckle image processing.
[BibTeX]
[DOI]
Elias Todorovich
,
Ana Lucía Dai Pra
,
Lucía Isabel Passoni
,
Martín Vázquez
,
Ezequiel Cozzolino
,
Fernando Ferrara
,
Gery Bioul
J. Real Time Image Process., 2016

2012
Correction to "Introducing Programmable Logic to Undergraduate Engineering Students in a Digital Electronics Course".
[BibTeX]
[DOI]
Elias Todorovich
,
José A. Marone
,
Martín Vázquez
IEEE Trans. Educ., 2012

Introducing Programmable Logic to Undergraduate Engineering Students in a Digital Electronics Course.
[BibTeX]
[DOI]
Elias Todorovich
,
José A. Marone
,
Martín Vázquez
IEEE Trans. Educ., 2012

2010
High-Speed FPGA 10's Complement Adders-Subtractors.
[BibTeX]
Gery Bioul
,
Martín Vázquez
,
Jean-Pierre Deschamps
,
Gustavo Sutter
Int. J. Reconfigurable Comput., 2010

2009
Decimal Adders/Subtractors in FPGA: Efficient 6-input LUT Implementations.
[BibTeX]
[DOI]
Martín Vázquez
,
Gustavo Sutter
,
Gery Bioul
,
Jean-Pierre Deschamps
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

FPGA Implementations of BCD Multipliers.
[BibTeX]
[DOI]
Gustavo Sutter
,
Elias Todorovich
,
Gery Bioul
,
Martín Vázquez
,
Jean-Pierre Deschamps
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009


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