Marcin Kubica

According to our database, Marcin Kubica authored at least 9 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Switching Activity Reduction of SOP Networks.

Marcin Kubica, Boleslaw Pochopien, Dariusz Kania

IEEE Access, 2024

2023

Technology mapping of multi-output functions leading to the reduction of dynamic power consumption in FPGAs.

Adam Opara, Marcin Kubica

Int. J. Appl. Math. Comput. Sci., 2023

Decomposition Approaches for Power Reduction.

Adam Opara, Marcin Kubica, Dariusz Kania

IEEE Access, 2023

2021

Technology Mapping for LUT-Based FPGA

Marcin Kubica, Adam Opara, Dariusz Kania

Lecture Notes in Electrical Engineering 713, Springer, ISBN: 978-3-030-60487-5, 2021

2019

Methods of Improving Time Efficiency of Decomposition Dedicated at FPGA Structures and Using BDD in the Process of Cyber-Physical Synthesis.

Adam Opara, Marcin Kubica, Dariusz Kania

IEEE Access, 2019

A Technology Mapping of FSMs Based on a Graph of Excitations and Outputs.

Marcin Kubica, Dariusz Kania, Józef Kulisz

IEEE Access, 2019

2018

Strategy of logic synthesis using MTBDD dedicated to FPGA.

Adam Opara, Marcin Kubica, Dariusz Kania

Integr., 2018

2017

Logic synthesis for FPGAs based on cutting of BDD.

Marcin Kubica, Adam Opara, Dariusz Kania

Microprocess. Microsystems, 2017

Area-oriented technology mapping for LUT-based logic blocks.

Marcin Kubica, Dariusz Kania

Int. J. Appl. Math. Comput. Sci., 2017