Marcin Lukowiak

According to our database1, Marcin Lukowiak authored at least 37 papers between 2006 and 2023.

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Bibliography

2023
Power Analysis Attacks on the Customizable MK-3 Authenticated Encryption Algorithm.
Proceedings of the 30th International Conference on Mixed Design of Integrated Circuits and System, 2023

2022
Memory Protection with Dynamic Authentication Trees.
Proceedings of the 29th International Conference on Mixed Design of Integrated Circuits and System, 2022

Statistical Analysis of the MK-3 Customizable Authenticated Encryption.
Proceedings of the IEEE Military Communications Conference, 2022

2021
Tree-Based Hardware Recursion for Divide-and-Conquer Algorithms.
Proceedings of the 2021 28th International Conference on Mixed Design of Integrated Circuits and System, 2021

Hardware Obfuscation of the 16-bit S-box in the MK-3 Cipher.
Proceedings of the 2021 28th International Conference on Mixed Design of Integrated Circuits and System, 2021

Solving the Cross Domain Problem with Functional Encryption.
Proceedings of the 2021 IEEE Military Communications Conference, 2021

2020
Using Reduced Graphs for Efficient HLS Scheduling.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Design of a Flexible Schönhage-Strassen FFT Polynomial Multiplier with High- Level Synthesis to Accelerate HE in the Cloud.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

Flexible HLS-Based Implementation of the Karatsuba Multiplier Targeting Homomorphic Encryption Schemes.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

Exploring the Application of Homomorphic Encryption to a Cross Domain Solution.
Proceedings of the 2019 IEEE Military Communications Conference, 2019

2018
Two Step Power Attack on SHA-3 Based MAC.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

Array-Based Statistical Analysis of the MK-3 Authenticated Encryption Scheme.
Proceedings of the 2018 IEEE Military Communications Conference, 2018

Customization Modes for the Harris MK-3 Authenticated Encryption Algorithm.
Proceedings of the 2018 IEEE Military Communications Conference, 2018

2017
Power Analysis of HLS-Designed Customized Instruction Set Architectures.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

2016
Implementing authenticated encryption algorithm MK-3 on FPGA.
Proceedings of the 2016 IEEE Military Communications Conference, 2016

Effectiveness of variable bit-length power analysis attacks on SHA-3 based MAC.
Proceedings of the 2016 IEEE Military Communications Conference, 2016

2015
Design and performance analysis of efficient Keccak tree hashing on GPU architectures.
J. Comput. Secur., 2015

Designing customized ISA processors using high level synthesis.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Constructing large S-boxes with area minimized implementations.
Proceedings of the 34th IEEE Military Communications Conference, 2015

Customizable sponge-based authenticated encryption using 16-bit S-boxes.
Proceedings of the 34th IEEE Military Communications Conference, 2015

A Parallelizing Matlab Compiler Framework and Run Time for Heterogeneous Systems.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

2014
Cybersecurity Education: Bridging the Gap Between Hardware and Software Domains.
ACM Trans. Comput. Educ., 2014

Performance modeling of pipelined linear algebra architectures on FPGAs.
Comput. Electr. Eng., 2014

Mission control: A performance metric and analysis of control logic for pipelined architectures on FPGAs.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Enabling FPGA support in Matlab based heterogeneous systems.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

2013
Minimizing performance overhead in memory encryption.
J. Cryptogr. Eng., 2013

High level synthesis: Where are we? A case study on matrix multiplication.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Distributed execution of transmural electrophysiological imaging with CPU, GPU, and FPGA.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Linear algebra computations in heterogeneous systems.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

Performance Modeling of Pipelined Linear Algebra Architectures on FPGAs.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

2011
Implantable Medical Device Communication Security: Pattern vs. Signal Encryption.
Proceedings of the 2nd USENIX Workshop on Health Security and Privacy, 2011

Versatile FPGA Architecture for Skein Hashing Algorithm.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

2010
Trustworthy Data Collection From Implantable Medical Devices Via High-Speed Security Implementation Based on IEEE 1363.
IEEE Trans. Inf. Technol. Biomed., 2010

Skein Tree Hashing on FPGA.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

2009
NTRU-based sensor network security: a low-power hardware implementation perspective.
Secur. Commun. Networks, 2009

2007
A New Architecture for Single-Event Detection & Reconfiguration of SRAM-based FPGAs.
Proceedings of the Tenth IEEE International Symposium on High Assurance Systems Engineering (HASE 2007), 2007

2006
Architecture design of an H.264/AVC decoder for real-time FPGA implementation.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006


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