Maria I. Mera Collantes

According to our database, Maria I. Mera Collantes authored at least 3 papers between 2016 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

Do Not Trust, Verify: A Verifiable Hardware Accelerator for Matrix Multiplication.

Maria I. Mera Collantes, Siddharth Garg

IEEE Embed. Syst. Lett., 2020

SafeTPU: A Verifiably Secure Hardware Accelerator for Deep Neural Networks.

Maria I. Mera Collantes, Zahra Ghodsi, Siddharth Garg

Proceedings of the 38th IEEE VLSI Test Symposium, 2020

2016

Threshold-Dependent Camouflaged Cells to Secure Circuits Against Reverse Engineering Attacks.

Maria I. Mera Collantes, Mohamed El Massad, Siddharth Garg

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016