Marisha Rawlins

According to our database1, Marisha Rawlins authored at least 8 papers between 2010 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2014
Analysis of cache tuner architectural layouts for multicore embedded systems.
Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014

2013
Adaptive loop caching using lightweight runtime control flow analysis.
ACM Trans. Embedded Comput. Syst., 2013

A Cache Tuning Heuristic for Multicore Architectures.
IEEE Trans. Computers, 2013

2012
Low-Energy Instruction Cache Optimization Techniques for Embedded Systems.
Proceedings of the Handbook of Energy-Aware and Green Computing - Two Volume Set., 2012

An application classification guided cache tuning heuristic for multi-core architectures.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
CPACT - The conditional parameter adjustment cache tuner for dual-core architectures.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011

On the interplay of loop caching, code compression, and cache configuration.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Lightweight runtime control flow analysis for adaptive loop caching.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010


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