Masahiro Ichihashi

According to our database, Masahiro Ichihashi authored at least 3 papers between 2006 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

3.3-mA 2.8-GHz bufferless LC oscillator directly driving a 10-mm on-chip clock distribution line.

Masahiro Ichihashi, Shogo Harada, Haruichi Kanaya

IEICE Electron. Express, 2019

2018

A Low-Power and GHz-Band <i>LC</i>-DCO Directly Drives 10mm On-Chip Clock Distribution Line in 0.18µm CMOS.

Masahiro Ichihashi, Haruichi Kanaya

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

2006

A 72Mb Separate-I/O Synchronous SRAM Chip with 504Gb/s Data Bandwidth.

Chih Tseng, Jae-Hyeong Kim, Suzanne Chen, Mu-Hsiang Huang, Chungji Lu, Ikio Hashiguchi, Yoshifumi Miyazima, Masahiro Ichihashi, Kentaro Maki, Katsuya Nakashima, Patrick Chuang

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006