Masahiro Sakamoto
According to our database1,
Masahiro Sakamoto
authored at least 11 papers
between 1998 and 2015.
Collaborative distances:
Collaborative distances:
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Bibliography
2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
2014
Proceedings of the IEEE 3rd Global Conference on Consumer Electronics, 2014
2012
Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing - Part II: Multiplication and Algebraic Functions.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing - Part I: Addition, Approximate Transcendental Functions, and Log-Domain Operations.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
2004
A design of 4-operand redundant binary parallel adder using neuron MOS.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A binary-quantized pseudo-diffusion system.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2002
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
1998
Proceedings of the 28th IEEE International Symposium on Multiple-Valued Logic, 1998