Matcha Surya Prakash

According to our database, Matcha Surya Prakash authored at least 8 papers between 2013 and 2022.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2022

A high throughput hardware architecture for deblocking filter in HEVC.

P. Kopperundevi, Matcha Surya Prakash, Shaik Rafi Ahamed

Signal Process. Image Commun., 2022

Methods to develop high throughput hardware architectures for HEVC Deblocking Filter using mixed pipelined-block processing techniques.

P. Kopperundevi, Matcha Surya Prakash

Microelectron. J., 2022

An Improved Dark Channel Prior for Fast Dehazing of Outdoor Images.

K. Vidyamol, Matcha Surya Prakash

Proceedings of the 13th International Conference on Computing Communication and Networking Technologies, 2022

2021

A Distributed Arithmetic based realization of the Least Mean Square Adaptive Decision Feedback Equalizer with Offset Binary Coding scheme.

Matcha Surya Prakash, Shaik Rafi Ahamed

Signal Process., 2021

2018

Improved convergent distributed arithmetic based low complexity pipelined least-mean-square filter.

Mohd. Tasleem Khan, Rafi Ahamed Shaik, Matcha Surya Prakash

IET Circuits Devices Syst., 2018

2016

DA based approach for the implementation of block adaptive decision feedback equaliser.

Matcha Surya Prakash, Rafi Ahamed Shaik

IET Signal Process., 2016

An Efficient Distributed Arithmetic-Based Realization of the Decision Feedback Equalizer.

Matcha Surya Prakash, Rafi Ahamed Shaik, Sagar Koorapati

Circuits Syst. Signal Process., 2016

2013

Low-Area and High-Throughput Architecture for an Adaptive Filter Using Distributed Arithmetic.

Matcha Surya Prakash, Rafi Ahamed Shaik

IEEE Trans. Circuits Syst. II Express Briefs, 2013