Mehri Teimoory

According to our database1, Mehri Teimoory authored at least 7 papers between 2014 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
A 2M1M Crossbar Architecture: Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2018

2017
A hybrid memristor-CMOS multiplier design based on memristive universal logic gates.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2016
Memristor-based 4: 2 compressor cells design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A novel hybrid CMOS-memristor logic circuit using Memristor Ratioed Logic.
Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016

2015
Memristor-based linear feedback shift register based on material implication logic.
Proceedings of the European Conference on Circuit Theory and Design, 2015

A novel memristor based integrate-and-fire neuron implementation using material implication logic.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

2014
Optimized implementation of memristor-based full adder by material implication logic.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014


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