Arash Ahmadi

Orcid: 0000-0001-5094-5967

According to our database1, Arash Ahmadi authored at least 105 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Investigation on Vision System: Digital FPGA Implementation in Case of Retina Rod Cells.
IEEE Trans. Biomed. Circuits Syst., April, 2024

A strong and fast millimeter-sized soft pneumatic actuator based on alternative pole water electrolysis.
Int. J. Intell. Robotics Appl., March, 2024

Efficient Brute-force state space search for Yin-Yang puzzle.
J. Supercomput., February, 2024

Multiplierless Implementation of Fitz-Hugh Nagumo (FHN) Modeling Using CORDIC Approach.
IEEE Trans. Emerg. Top. Comput. Intell., February, 2024


2023
Digital Hardware Implementation of Morris-Lecar, Izhikevich, and Hodgkin-Huxley Neuron Models With High Accuracy and Low Resources.
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2023

A Memristive-Based Design of a Core Digital Circuit for Elliptic Curve Cryptography.
J. Circuits Syst. Comput., October, 2023

Efficient Digital Realization of Endocrine Pancreatic $\beta$-Cells.
IEEE Trans. Biomed. Circuits Syst., April, 2023

Design and Analysis of the Morris-Lecar Spiking Neuron in Efficient Analog Implementation.
IEEE Trans. Circuits Syst. II Express Briefs, 2023

Multiplierless low-cost implementation of Hindmarsh-Rose neuron model in case of large-scale realization.
Int. J. Circuit Theory Appl., 2023

Uniformity Adjustment of Delay-Based Physical Unclonable Function: Modeling and Analysis.
Proceedings of the 19th International Conference on Synthesis, 2023

A Programmable Circuit Based on the Combination of VTM Cellular Crossbars.
Proceedings of the 19th International Conference on Synthesis, 2023

Design and Implementation of Full Adder Circuit Based on VTM-Logic Gates.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

High-Performance FPGA Implementation of Fully Connected Networks of SAM Neurons.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Dual Stage Resource Efficient ECG Classifier.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

2022
Characterizing a standard cell library for large scale design of memristive based signal processing.
IET Circuits Devices Syst., 2022

Detection of sleep apnea using Machine learning algorithms based on ECG Signals: A comprehensive systematic review.
Expert Syst. Appl., 2022

A Digital Realization of Neuroglial Interaction Model and Its Network Structure.
IEEE Access, 2022

3D Convolutional Neural Network for Speech Emotion Recognition With Its Realization on Intel CPU and NVIDIA GPU.
IEEE Access, 2022

Spiking Neurons: A New Entropy Source for Physically Unclonable Functions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Design of A New Memristive-Based Architecture Using VTM Method.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Digital Realization of Conductance-Based Adaptive Exponential Integrate-and-Fire Neuron Model.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
High Speed and Low Digital Resources Implementation of Hodgkin-Huxley Neuronal Model Using Base-2 Functions.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

An Efficient Digital Realization of Retinal Light Adaptation in Cone Photoreceptors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Optimizing number of spots and cluster size of a high-throughput communication satellite payload.
Int. J. Satell. Commun. Netw., 2021

Digital Realization of Ca2+ Oscillation With Impact of Amyloid-β.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

A Novel Architecture for Memristor-Based Logic.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Implementing An Improved Image Enhancement Algorithm On FPGA.
Proceedings of the 34th IEEE Canadian Conference on Electrical and Computer Engineering, 2021

2020
Hardware-Algorithm Co-Design of a Compressed Fuzzy Active Learning Method.
IEEE Trans. Circuits Syst., 2020

A Novel Digital Realization of AdEx Neuron Model.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

CORDIC-Astrocyte: Tripartite Glutamate-IP3-Ca<sup>2+</sup> Interaction Dynamics on FPGA.
IEEE Trans. Biomed. Circuits Syst., 2020

Digital FPGA implementation of spontaneous astrocyte signalling.
Int. J. Circuit Theory Appl., 2020

Time Step Impact on Performance and Accuracy of Izhikevich Neuron: Software Simulation and Hardware Implementation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Low Power Memristor-Based Shift Register Design.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

Hybrid Memristor-CMOS Based Up-Down Counter Design.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019
An Efficient Uniform-Segmented Neuron Model for Large-Scale Neuromorphic Circuit Design: Simulation and FPGA Synthesis Results.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

CORDIC-SNN: On-FPGA STDP Learning With Izhikevich Neurons.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A Low-Cost High-Speed Neuromorphic Hardware Based on Spiking Neural Network.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Novel Nonlinear Function Evaluation Approach for Efficient FPGA Mapping of Neuron and Synaptic Plasticity Models.
IEEE Trans. Biomed. Circuits Syst., 2019

High-power multi-octave laterally diffused metal-oxide-semiconductor power amplifier with resistive harmonic termination.
IET Circuits Devices Syst., 2019

Implementation of application specific soft-core architecture for switching converters.
Comput. Electr. Eng., 2019

Digital Implementation of a Biological-Plausible Model for Astrocyte Ca ^2+ Oscillations.
Proceedings of the Advances in Computational Intelligence, 2019

2018
A 2M1M Crossbar Architecture: Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Logic Design on Mirrored Memristive Crossbars.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Digital Multiplierless Realization of Coupled Wilson Neuron Model.
IEEE Trans. Biomed. Circuits Syst., 2018

Multiplierless Implementation of Noisy Izhikevich Neuron With Low-Cost Digital Design.
IEEE Trans. Biomed. Circuits Syst., 2018

Implementation of adaptive neuron based on memristor and memcapacitor emulators.
Neurocomputing, 2018

A low-cost and flexible architecture of digitally controlled DC-DC converter to improve dynamic performance.
Turkish J. Electr. Eng. Comput. Sci., 2018

On the power handling of a high power combiner for industrial, scientific, and medical applications.
Turkish J. Electr. Eng. Comput. Sci., 2018

A Memristive TaOx-Based Median Filter Design for Image Processing Application.
Proceedings of the 15th International Conference on Synthesis, 2018

Hardware Design of Chaotic Pseudo-Random Number Generator Based on Nonlinear Feedback Shift Register.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Hardware Implementation of A Chaotic Pseudo Random Number Generator Based on 3D Chaotic System without Equilibrium.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
Complete Neuron-Astrocyte Interaction Model: Digital Multiplierless Design and Networking Mechanism.
IEEE Trans. Biomed. Circuits Syst., 2017

Realistic Hodgkin-Huxley Axons Using Stochastic Behavior of Memristors.
Neural Process. Lett., 2017

Transient response characteristic of memristor circuits and biological-like current spikes.
Neural Comput. Appl., 2017

Accurate charge transport model for nanoionic memristive devices.
Microelectron. J., 2017

Broadband high power stripline compact multisection coupled-line coupler for VHF and UHF applications.
Turkish J. Electr. Eng. Comput. Sci., 2017

A hybrid memristor-CMOS multiplier design based on memristive universal logic gates.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Secure authentication and access mechanism for IoT wireless sensors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

STDP-based unsupervised learning of memristive spiking neural network by Morris-Lecar model.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Pulse width modulation (PWM) signals using spiking neuronal networks.
Proceedings of the 2017 IEEE International Conference on Signal and Image Processing Applications, 2017

Hybrid memristor-CMOS based linear feedback shift register design.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

Digital FCS-MP control of an AC-DC power converter to improve dynamic response.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

A novel CVNS adder with memristive analog memory.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

A memristor based binary multiplier.
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017

2016
A CORDIC Based Digital Hardware For Adaptive Exponential Integrate and Fire Neuron.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

VLSI implementable neuron-astrocyte control mechanism.
Neurocomputing, 2016

Effect of spike-timing-dependent plasticity on neural assembly computing.
Neurocomputing, 2016

evt_MNIST: A spike based version of traditional MNIST.
CoRR, 2016

A modified synapse model for neuromorphic circuits.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Analog cellular neural network for application in physical unclonable functions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Memristor-based 4: 2 compressor cells design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

High accuracy implementation of Adaptive Exponential integrated and fire neuron model.
Proceedings of the 2016 International Joint Conference on Neural Networks, 2016

Hardware implementation of deep brain stimulator on a biophysical neural population model.
Proceedings of the 2016 International Joint Conference on Neural Networks, 2016

Evolving Spiking Neural Networks of artificial creatures using Genetic Algorithm.
Proceedings of the 2016 International Joint Conference on Neural Networks, 2016

Brain-inspired pattern classification with memristive neural network using the Hodgkin-Huxley neuron.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

A novel hybrid CMOS-memristor logic circuit using Memristor Ratioed Logic.
Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016

A cellular automata based Izhikevich neuron model.
Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016

2015
Digital Implementation of a Biological Astrocyte Model and Its Application.
IEEE Trans. Neural Networks Learn. Syst., 2015

A Hopf Resonator for 2-D Artificial Cochlea: Piecewise Linear Model and Digital Implementation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Digital multiplierless implementation of the biological FitzHugh-Nagumo model.
Neurocomputing, 2015

Networked Adaptive Non-linear Oscillators: A Digital Synthesis and Application.
Circuits Syst. Signal Process., 2015

Hyperbolic tangent passive resistive-type neuron.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Memristor-based linear feedback shift register based on material implication logic.
Proceedings of the European Conference on Circuit Theory and Design, 2015

A novel memristor based integrate-and-fire neuron implementation using material implication logic.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

Sound target localization in a 2-D microphone array.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

A CMOS implementation of programmable Gaussian fuzzifier.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

2014
Digital Multiplierless Implementation of Biological Adaptive-Exponential Neuron Model.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A generalized analog implementation of piecewise linear neuron models using CCII building blocks.
Neural Networks, 2014

Spiking neuro-fuzzy clustering system and its memristor crossbar based implementation.
Microelectron. J., 2014

Cellular Memristive Dynamical Systems (CMDS).
Int. J. Bifurc. Chaos, 2014

Optimized implementation of memristor-based full adder by material implication logic.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

A low cost biomimetic implementation of a CPG based on AdEx neuron model.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2012
Biologically Inspired Spiking Neurons: Piecewise Linear Models and Digital Implementation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

An analog implementation of biologically plausible neurons using CCII building blocks.
Neural Networks, 2012

A Comparative Study on a Built Sun Tracker and Fixed Converter Panels.
Int. J. Energy Optim. Eng., 2012

A Large Scale Digital Simulation of Spiking Neural Networks (SNN) on Fast SystemC Simulator.
Proceedings of the 14th International Conference on Computer Modelling and Simulation, 2012

Error management and detection in computer networks using Bloom filters.
Proceedings of the 2012 International Conference on Advances in Computing, 2012

2011
On the VLSI Implementation of Adaptive-Frequency Hopf Oscillator.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

Fixed-point multiplication: A probabilistic bit-pattern view.
Microelectron. Reliab., 2011

2010
Very large scale integration architecture for integer wavelet transform.
IET Comput. Digit. Tech., 2010

Effects of CNT diameter variability on a CNFET-based SRAM.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2008
On the probability distribution of fixed-point multiplication.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Symbolic noise analysis approach to computational hardware optimization.
Proceedings of the 45th Design Automation Conference, 2008

2007
Multiple-Width Bus Partitioning Approach to Datapath Synthesis.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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