Meng-Chiou Wu

According to our database, Meng-Chiou Wu authored at least 11 papers between 1998 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

NFV deployment strategies in SDN network.

Chia-Wei Tseng, Po-Hao Lai, Bo-Sheng Huang, Li-Der Chou, Meng-Chiou Wu

Int. J. High Perform. Comput. Netw., 2019

2008

Chip placement in a reticle for multiple-project wafer fabrication.

Meng-Chiou Wu, Rung-Bin Lin, Shih-Cheng Tsai

ACM Trans. Design Autom. Electr. Syst., 2008

Finding Dicing Plans for Multiple Project wafers fabricated with Shuttle Mask.

Meng-Chiou Wu, Rung-Bin Lin

J. Circuits Syst. Comput., 2008

2007

Reticle Design for Minimizing Multiproject Wafer Production Cost.

Rung-Bin Lin, Meng-Chiou Wu, Shih-Cheng Tsai

IEEE Trans Autom. Sci. Eng., 2007

Reticle Exposure Plans for Multi-Project Wafers.

Rung-Bin Lin, Da-Wei Hsu, Ming-Hsine Kuo, Meng-Chiou Wu

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006

Design space exploration for minimizing multi-project wafer production cost.

Rung-Bin Lin, Meng-Chiou Wu, Wei-Chiu Tseng, Ming-Hsine Kuo, Tsai-Ying Lin, Shr-Cheng Tsai

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

A Comparative Study on Dicing of Multiple Project Wafers.

Meng-Chiou Wu, Rung-Bin Lin

Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

Reticle Floorplanning and Wafer Dicing for Multiple Project Wafers.

Meng-Chiou Wu, Rung-Bin Lin

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Multiple project wafers for medium-volume IC production.

Meng-Chiou Wu, Rung-Bin Lin

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Reticle floorplanning of flexible chips for multi-project wafers.

Meng-Chiou Wu, Rung-Bin Lin

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

1998

A New Statistical Approach to Timing Analysis of VLSI Circuits.

Rung-Bin Lin, Meng-Chiou Wu

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998