Minge Jiang

Orcid: 0009-0007-4383-5357

According to our database1, Minge Jiang authored at least 5 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A 40MHz Dual BEoL-RC Frequency Reference in 28nm CMOS with +440/-230ppm Inaccuracy from -55°C to 125°C and +940/+50ppm Inaccuracy After Accelerated Aging.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2026

2025
A Continuous-Time Capacitance-to-Digital Converter for Floating-Target Displacement Sensing.
IEEE J. Solid State Circuits, December, 2025

A 2.06-zF<sub>rms</sub> Resolution Lock-In Amplifier With SAR-Assisted Parasitic and Baseline Capacitance Compensation.
IEEE J. Solid State Circuits, October, 2025

3.2 A 36V Current-Balancing Instrumentation Amplifier with ±24V Input Range, 5.6MHz BW, and 140dB CMRR at All Gain Settings.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2024
A 1kHz-to-62MHz 2.06zFrms Resolution Lock-in Amplifier with SAR-assisted Parasitic and Baseline Capacitance Compensation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024


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