Mirlaine Crepalde

According to our database, Mirlaine Crepalde authored at least 4 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Vectorization of Verilog Designs and its Effects on Verification and Synthesis.

Maria Fernanda Oiveira Guimarães, Ulisses Rosa, Ian Trudel, João Victor Amorim, Augusto Mafra, Mirlaine Crepalde, Fernando Magno Quintão Pereira

CoRR, March, 2026

2025

Bottom-Up Generation of Verilog Designs for Testing EDA Tools.

João Victor Amorim, Luiza de Melo Gomes, Rafael Sumitani, Raissa Maciel, Augusto Mafra, Mirlaine Crepalde, Fernando Magno Quintão Pereira

CoRR, April, 2025

Automatic Test Case Generation for Jasper App HDL Compiler: An Industry Experience.

Mirlaine Crepalde, Augusto Mafra, Lucas Cavalini, Lucas Martins, Guilherme Amorim, Pedro Henrique Santos, Fabiano Peixoto

Proceedings of the 34th ACM SIGPLAN International Conference on Compiler Construction, 2025

2024

ChiBench: a Benchmark Suite for Testing Electronic Design Automation Tools.

Rafael Sumitani, João Victor Amorim, Augusto Mafra, Mirlaine Crepalde, Fernando Magno Quintão Pereira

CoRR, 2024