Mountassar Maamoun

Orcid: 0000-0003-1598-4500

According to our database1, Mountassar Maamoun authored at least 6 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
An Efficient FPGA-Based Gaussian Random Number Generator Using an Accurate Segmented Box-Muller Method.
IEEE Access, 2023

2021
Efficient FPGA based architecture for high-order FIR filtering using simultaneous DSP and LUT reduced utilization.
IET Circuits Devices Syst., 2021

2017
Simulation and implementation of incremental conductance MPPT algorithm with indirect control method using buck converter.
Proceedings of the 6th International Conference on Systems and Control, 2017

2013
Controlled start-up stochastic decoding of LDPC codes.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

2004
Interfacing in Microprocessor-based Systems with an Advanced Physical Addressing.
Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

2003
Interfacing in Microprocessor-based Systems with a Fast Physical Addressing.
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003


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