Rachid Beguenane

According to our database1, Rachid Beguenane authored at least 26 papers between 2004 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
An Efficient FPGA-Based Gaussian Random Number Generator Using an Accurate Segmented Box-Muller Method.
IEEE Access, 2023

FPGA-Based Digital FIR Filters With Small Coefficients and Large Data Input.
Proceedings of the 13th IEEE Annual Computing and Communication Workshop and Conference, 2023

Comparing FPGA-Based Adders and Application to the Implementation of a Digital FIR Filter.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2023

FPGA-Based 8x8 Bits Signed Multipliers Using LUTs.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2023

2022
FPGA-Based Designs of the Factorial Function.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2022

2021
Efficient FPGA based architecture for high-order FIR filtering using simultaneous DSP and LUT reduced utilization.
IET Circuits Devices Syst., 2021

2018
Robust Nonlinear Controller Design for On-Grid/Off-Grid Wind Energy Battery-Storage System.
IEEE Trans. Smart Grid, 2018

DQ Synchronous Frame Nonlinear Controller Design for a Single-Phase Stand-Alone and Grid-Connected Hybrid Wind/Battery System.
Proceedings of the IECON 2018, 2018

2017
Signal-Based Sensor Fault Detection and Isolation for PMSG in Wind Energy Conversion Systems.
IEEE Trans. Instrum. Meas., 2017

2016
Energy management strategy of on-grid/off-grid wind energy battery-storage system.
Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016

2015
A unified nonlinear controller design for on-grid/off-grid wind energy battery-storage system.
Proceedings of the IECON 2015, 2015

Sliding mode speed control for wind energy conversion systems.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

Feedback linearization control with sliding mode disturbance compensator for PMSG based wind energy conversion system.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

2014
Wind turbine emulator using OPAL-RT real-time HIL/RCP laboratory.
Proceedings of the 26th International Conference on Microelectronics, 2014

Predictive speed controller for laboratory size wind turbine experiment system.
Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014

2013
Nonlinear model predictive controller with state observer for speed sensorless induction generator-wind turbine systems.
J. Syst. Control. Eng., 2013

Controlled start-up stochastic decoding of LDPC codes.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

2012
An optimum speed MPPT controller for variable speed PMSG wind energy conversion systems.
Proceedings of the 38th Annual Conference on IEEE Industrial Electronics Society, 2012

Maximum power point tracking and frequency control for hybrid wind diesel system supplying an isolated load.
Proceedings of the 38th Annual Conference on IEEE Industrial Electronics Society, 2012

A multivariable adaptive nonlinear controller for a five-level diode clamped active power filter.
Proceedings of the American Control Conference, 2012

2009
Performance Evaluation of Rotor Flux-Oriented Control on FPGA for Advanced AC Drives.
J. Robotics Mechatronics, 2009

Prototyping Advanced Control Systems on FPGA.
EURASIP J. Embed. Syst., 2009

2006
A new scheme for sensorless induction motor control drives operating in low speed region.
Math. Comput. Simul., 2006

Towards the System-on-Chip Realization of a Sensorless Vector Controller with Microsecond-order Computation Time.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

2005
A 2005 review of FPGA arithmetic (abstract only).
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

2004
A new bit-serial multiplier architecture for area-efficient fpga implementation.
Proceedings of the Second IASTED International Conference on Circuits, 2004


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