N. Bhavanishankar

According to our database, N. Bhavanishankar authored at least 4 papers between 1996 and 1998.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1998

A linear array processor with dynamic frequency clocking for image processing applications.

Nagarajan Ranganathan, Narayanan Vijaykrishnan, N. Bhavanishankar

IEEE Trans. Circuits Syst. Video Technol., 1998

1996

A dynamic frequency linear array processor for image processing.

N. Ranganathan, N. Bhavanishankar, Narayanan Vijaykrishnan

Proceedings of the 13th International Conference on Pattern Recognition, 1996

DFLAP: a dynamic frequency linear array processor.

Narayanan Vijaykrishnan, Nagarajan Ranganathan, N. Bhavanishankar

Proceedings of the Proceedings 1996 International Conference on Image Processing, 1996

A VLSI array architecture with dynamic frequency clocking.

N. Ranganathan, Narayanan Vijaykrishnan, N. Bhavanishankar

Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996