Nan-Cheng Lai

According to our database1, Nan-Cheng Lai authored at least 5 papers between 2004 and 2013.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2013
Delay Test with Embedded Test Pattern Generator.
J. Inf. Sci. Eng., 2013

2008
On-Chip Test Generation Mechanism for Scan-Based Two-Pattern Tests.
Proceedings of the 17th IEEE Asian Test Symposium, 2008

2007
Low-Capture-Power Test Generation by Specifying A Minimum Set of Controlling Inputs.
Proceedings of the 16th Asian Test Symposium, 2007

2006
Low-Power BIST With a Smoother and Scan-Chain Reorder Under Optimal Cluster Size.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2004
Low Power BIST with Smoother and Scan-Chain Reorder .
Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004


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