Naveen Kollepara
Orcid: 0009-0008-1756-0916
According to our database1,
Naveen Kollepara authored at least 3 papers
in 2025.
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Bibliography
2025
SiFFS: A Scalable in-Fault Functional Simulation Framework for Fault Criticality Analysis.
Proceedings of the IEEE European Test Symposium, 2025
A Configurable RISC-V Vector Processor with FSM-Driven Accelerator for Data-Intensive Workloads.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2025
Fast and Energy-Efficient Pipelined Vedic Multiplier Design for Modern Cryptographic Processors.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2025