Naveen Murali G

According to our database1, Naveen Murali G authored at least 2 papers between 2018 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2019
Mapping of Boolean Logic Functions onto 3D Memristor Crossbar.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2018
Modelling and Simulation of Non-Ideal MAGIC NOR Gates on Memristor Crossbar.
Proceedings of the 8th International Symposium on Embedded Computing and System Design, 2018


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