Navya Mohan

Orcid: 0000-0002-1224-1288

According to our database1, Navya Mohan authored at least 4 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Early Detection of Clustered Trojan Attacks on Integrated Circuits Using Transition Delay Fault Model.
Cryptogr., March, 2023

2022
Test and diagnosis pattern generation for distinguishing stuck-at faults and bridging faults.
Integr., 2022

2017
Efficient test scheduling for reusable BIST in 3D stacked ICs.
Proceedings of the 2017 International Conference on Advances in Computing, 2017

2016
A zero suppressed binary decision diagram-based test set relaxation for single and multiple stuck-at faults.
Int. J. Math. Model. Numer. Optimisation, 2016


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