Nicolai Fiege

Orcid: 0000-0002-4357-2119

According to our database1, Nicolai Fiege authored at least 7 papers between 2019 and 2024.

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Bibliography

2024
Bit-Level Optimized Constant Multiplication Using Boolean Satisfiability.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024

2023
BLOOP: Boolean Satisfiability-based Optimized Loop Pipelining.
ACM Trans. Reconfigurable Technol. Syst., September, 2023

2022
Optimal and Heuristic Approaches to Modulo Scheduling With Rational Initiation Intervals in Hardware Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Speeding Up Optimal Modulo Scheduling with Rational Initiation Intervals.
Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

Optimal Binding and Port Assignment for Loop Pipelining in High-Level Synthesis.
Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

Improving Energy Efficiency in Loop Pipelining by Rational-II Modulo Scheduling.
Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

2019
Isomorphic Subgraph-based Problem Reduction for Resource Minimal Modulo Scheduling.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019


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