Nicolas Demassieux

According to our database1, Nicolas Demassieux authored at least 19 papers between 1984 and 1998.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

1998
Decoding of constellations matched to the Rayleigh fading channel.
Ann. des Télécommunications, 1998

1996
A Generic Smart Sensor Model for Real-time Distributed Data Acquisition Systems.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996

1995
VLSI architectures for video compression-a survey.
Proc. IEEE, 1995

1994
Optimization of Real-Time VLSI Architectures for Distributed Arithmetic-Based Algorithms: Application to HDTV Filters.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Optimal VLSI architecture for distributed arithmetic-based algorithms.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

1993
A Generalized Precompiling scheme for Surviving Path Memory Management in Viterbi decoders.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Memory-I/O tradeoff and VLSI implementation of lapped transforms for image processing.
Proceedings of the IEEE International Conference on Acoustics, 1993

1992
From image coding to multimedia: Algorithms and architectures for a revolution.
Microprocess. Microprogramming, 1992

1991
A real-time discrete cosine transform chip.
Digit. Signal Process., 1991

A versatile architecture for VLSI implementation of the Viterbi algorithm.
Proceedings of the 1991 International Conference on Acoustics, 1991

1990
Real-time VLSI architecture for geometric image transformations.
Proceedings of the Visual Communications and Image Processing '90: Fifth in a Series, 1990

A new VLSI architecture for large kernel real time convolution.
Proceedings of the 1990 International Conference on Acoustics, 1990

1988
A single chip VLSI architecture for a real time stereo vision processor.
Proceedings of the IEEE International Conference on Acoustics, 1988

A VLSI architecture for real-time image convolution with large symmetric kernels.
Proceedings of the IEEE International Conference on Acoustics, 1988

1987
An optimized VLSI architecture for a multiformat discrete cosine transform.
Proceedings of the IEEE International Conference on Acoustics, 1987

1986
VDP : A versatile high performance vector distance processor.
Proceedings of the IEEE International Conference on Acoustics, 1986

A single chip video rate 16×16 discrete cosine transform.
Proceedings of the IEEE International Conference on Acoustics, 1986

1985
VLSI Architecture for a one chip video median filter.
Proceedings of the IEEE International Conference on Acoustics, 1985

1984
VLSI architectures for dynamic time warping using systolic arrays.
Proceedings of the IEEE International Conference on Acoustics, 1984


  Loading...