Nicolas Denoyelle

Orcid: 0000-0001-8282-9653

According to our database1, Nicolas Denoyelle authored at least 9 papers between 2014 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2022
Rapid Execution Time Estimation for Heterogeneous Memory Systems Through Differential Tracing.
Proceedings of the High Performance Computing - 37th International Conference, 2022

2021
Narrowing the Search Space of Applications Mapping on Hierarchical Topologies.
Proceedings of the 2021 International Workshop on Performance Modeling, 2021

2019
Modeling Non-Uniform Memory Access on Large Compute Nodes with the Cache-Aware Roofline Model.
IEEE Trans. Parallel Distributed Syst., 2019

Explicit Data Layout Management for Autotuning Exploration on Complex Memory Topologies.
Proceedings of the 2019 IEEE/ACM Workshop on Memory Centric High Performance Computing, 2019

Data and Thread Placement in NUMA Architectures: A Statistical Learning Approach.
Proceedings of the 48th International Conference on Parallel Processing, 2019

2018
De la localité logicielle à la localité matérielle sur les architectures à mémoire partagée, hétérogène et non-uniforme. (From Software Locality to Hardware Locality in Shared Memory Systems with NUMA and Heterogenous Memory).
PhD thesis, 2018

2017
Modeling Large Compute Nodes with Heterogeneous Memories with Cache-Aware Roofline Model.
Proceedings of the High Performance Computing Systems. Performance Modeling, Benchmarking, and Simulation, 2017

2015
A Topology-Aware Performance Monitoring Tool for Shared Resource Management in Multicore Systems.
Proceedings of the Euro-Par 2015: Parallel Processing Workshops, 2015

2014
VirtualEnaction - A Platform for Systemic Neuroscience Simulation.
Proceedings of the 2nd International Congress on Neurotechnology, 2014


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