Nikhil Kulkarni

According to our database1, Nikhil Kulkarni authored at least 4 papers between 2012 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
Experiments and analysis to characterize logic state retention limitations in 28nm process node.
Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Analysis, modeling and silicon correlation of low-voltage flop data retention in 28nm process technology.
Proceedings of the International Symposium on Quality Electronic Design, 2013

Novel method for optimal placement of power system stabilizer using principal component analysis.
Proceedings of the 2013 IEEE Industry Applications Society Annual Meeting, 2013

2012
A Hybrid Buffer Design with STT-MRAM for On-Chip Interconnects.
Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012


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