Nivedita Rai

Orcid: 0000-0002-3941-7941

According to our database1, Nivedita Rai authored at least 2 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
Pragmatic Evaluation of Process Corners in ULP Subthreshold Circuits With Quantum Confinement Effects in Junctionless Nanowire Transistor.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024

2015
Three Levels Interconnect Signaling in On-Chip High Speed SerDes Transceiver for Multi-Module SoC Communication.
Proceedings of the Sixth International Conference on Computer and Communication Technology 2015, 2015


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